Datasheet
"#$%#
SBFS026B − JUNE 2004 − REVISED SEPTEMBER 2007
www.ti.com
28
CONTROL REGISTER MAP
(Software Mode Only)
The control register map for the SRC4184 is shown in Table 7. There are two identical register banks, one for SRC A and
one for SRC B, each conforming to the register map shown in Table 7.
Register 0 is reserved for factory use and defaults to all zeros upon reset. The user should avoid writing to or reading this
register, as unexpected operation may result if Register 0 is programmed to an arbitrary value.
Register 1 through Register 5 contain control bits, which are programmed to configure specific internal functions.
Register 1 through Register 5 are available for write or read access. Register 6 and Register 7 contain the integer and
fractional parts of the f
sIN
:f
sOUT
sampling ratio and are read only status registers.
Table 7. Control Register Map for Either the SRC A or SRC B Register Banks
REGISTER ADDRESS
(HEX)
D7
(MSB)
D6 D5 D4 D3 D2 D1 D0
0 0 0 0 0 0 0 0 0
1 PDN TRACK 0 MUTE BYPASS MODE2 MODE1 MODE0
2 0 0 0 DEM1 DEM0 DDN LGRP1 LGRP0
3 OWL1 OWL0 OFMT1 OFMT0 0 IFMT2 IFMT1 IFMT0
4 AL7 AL6 AL5 AL4 AL3 AL2 AL1 AL0
5 AR7 AR6 AR5 AR4 AR3 AR2 AR1 AR0
6 SRI4 SRI3 SRI2 SRI1 SRI0 SRF10 SRF9 SRF8
7 SRF7 SRF6 SRF5 SRF4 SRF3 SRF2 SRF1 SRF0