Datasheet
Table Of Contents
- features
- description
- DEVELOPMENT TOOL SUPPORT
- pin designation, MSP430x4351IPN, MSP430x4361IPN, MSP430x4371IPN
- pin designation, MSP430x435IPZ, MSP430x436IPZ, MSP430x4371IPZ
- pin designation, MSP430x435IPN, MSP430x436IPN, MSP430x437IPN
- pin designation, MSP430x435IPZ, MSP430x436IPZ, MSP430x437IPZ
- pin designation, MSP430x4481IPZ, MSP430x4491IPZ
- pin designation, MSP430x447IPZ, MSP430x448IPZ, MSP430x449IPZ
- MSP430x43x1 functional block diagram
- MSP430x43x functional block diagram
- MSP430x44x1 functional block diagram
- MSP430x44x functional block diagram
- MSP430x43x1 Terminal Functions
- MSP430x43x Terminal Functions
- MSP430x44x1 Terminal Functions
- MSP430x44x Terminal Functions
- short-form description
- CPU
- instruction set
- operating modes
- interrupt vector addresses
- special function registers
- interrupt enable 1 and 2
- interrupt flag register 1 and 2
- module enable registers 1 and 2
- memory organization
- bootstrap loader (BSL)
- flash memory
- peripherals
- digital I/O
- oscillator and system clock
- brownout, supply voltage supervisor (SVS)
- hardware multiplier (MSP430x44x(1) only)
- watchdog timer (WDT)
- USART0
- USART1 (MSP430x44x(1) only)
- Timer_A3
- Timer_B3 (MSP430x43x(1) only)
- Timer_B7 (MSP430x44x(1) only)
- Comparator_A
- ADC12 (not implemented in MSP430x43x1 and MSP430x44x1)
- Basic Timer1
- LCD driver
- peripheral file map
- absolute maximum ratings
- recommended operating conditions
- electrical characteristics
- supply current into AVCC + DVCC excluding external current
- Schmitt-trigger inputs - ports P1, P2, P3, P4, P5, P6
- standard inputs - RST/NMI, JTAG (TCK, TMS, TDI/TCLK)
- inputs Px.x, TAx, TBx
- leakage current
- outputs - ports P1, P2, P3, P4, P5, P6
- output frequency
- wake-up LPM3
- RAM
- LCD
- Comparator_A
- POR/brownout reset (BOR)
- supply voltage supervisor/monitor (SVS)
- DCO
- crystal oscillator, LFXT1 oscillator
- crystal oscillator, XT2 oscillator
- USART0, USART1
- 12-bit ADC, power supply and input range conditions
- 12-bit ADC, external reference
- 12-bit ADC, built-in reference
- 12-bit ADC, timing parameters
- 12-bit ADC, linearity parameters
- 12-bit ADC, temperature sensor and built-in VMID
- flash memory
- JTAG interface
- JTAG fuse
- APPLICATION INFORMATION
- input/output schematics
- port P1, P1.0 to P1.5, input/output with Schmitt trigger
- port P1, P1.6, P1.7, input/output with Schmitt trigger
- port P2, P2.0, P2.4 to P2.5, input/output with Schmitt trigger
- port P2, P2.1 to P2.3, input/output with Schmitt trigger
- port P2, P2.6 to P2.7, input/output with Schmitt trigger
- port P3, P3.0 to P3.3, input/output with Schmitt trigger
- port P3, P3.4 to P3.7, input/output with Schmitt trigger
- port P4, P4.0 to P4.7, input/output with Schmitt trigger
- port P5, P5.0 to P5.1, input/output with Schmitt trigger
- port P5, P5.2 to P5.4, input/output with Schmitt trigger
- port P5, P5.5 to P5.7, input/output with Schmitt trigger
- port P6, P6.0 to P6.6, input/output with Schmitt trigger
- port P6, P6.0 to P6.6, input/output with Schmitt trigger
- port P6, P6.7, input/output with Schmitt trigger
- JTAG pins TMS, TCK, TDI/TCLK, TDO/TDI, input/output with Schmitt trigger or output
- JTAG fuse check mode
- input/output schematics
- Data Sheet Revision History
MSP430x43x1, MSP430x43x, MSP430x44x1, MSP430x44x
MIXED SIGNAL MICROCONTROLLER
SLAS344G − JANUARY 2002 − REVISED OCTOBER 2009
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MSP430x43x1 Terminal Functions (Continued)
TERMINAL
PN
I/O
PZ
I/O
DESCRIPTION
NAME NO.
I/O
NAME NO.
I/O
DESCRIPTION
P3.3/UCLK0/S28 40 I/O S28 40 O
General-purpose digital I/O / ext. clock i/p—USART0/UART or SPI
mode, clock o/p—USART0/SPI mode / LCD segment output 28
P3.2/SOMI0/S29 41 I/O S29 41 O
General-purpose digital I/O / slave out/master in of USART0/SPI mode
/ LCD segment output 29
P3.1/SIMO0/S30 42 I/O S30 42 O
General-purpose digital I/O / slave out/master out of USART0/SPI
mode / LCD segment output 30
P3.0/STE0/S31 43 I/O S31 43 O
General-purpose digital I/O / slave transmit enable-USART0/SPI
mode / LCD segment output 31
S32 44 O LCD segment output 32
S33 45 O LCD segment output 33
P4.7/S34 46 I/O General-purpose digital I/O / LCD segment output 34
P4.6/S35 47 I/O General-purpose digital I/O / LCD segment output 35
P4.5/S36 48 I/O General-purpose digital I/O / LCD segment output 36
P4.4/S37 49 I/O General-purpose digital I/O / LCD segment output 37
P4.3/S38 50 I/O General-purpose digital I/O / LCD segment output 38
P4.2/S39 51 I/O General-purpose digital I/O / LCD segment output 39
COM0 44 O COM0 52 O COM0−3 are used for LCD backplanes.
P5.2/COM1 45 I/O P5.2/COM1 53 I/O
General-purpose digital I/O / common output, COM0−3 are used for
LCD backplanes.
P5.3/COM2 46 I/O P5.3/COM2 54 I/O
General-purpose digital I/O / common output, COM0−3 are used for
LCD backplanes.
P5.4/COM3 47 I/O P5.4/COM3 55 I/O
General-purpose digital I/O / common output, COM0−3 are used for
LCD backplanes.
R03 48 I R03 56 I Input port of fourth positive (lowest) analog LCD level (V5)
P5.5/R13 49 I/O P5.5/R13 57 I/O
General-purpose digital I/O / input port of third most positive analog
LCD level (V4 or V3)
P5.6/R23 50 I/O P5.6/R23 58 I/O
General-purpose digital I/O / input port of second most positive analog
LCD level (V2)
P5.7/R33 51 I/O P5.7/R33 59 I/O
General-purpose digital I/O / output port of most positive analog LCD
level (V1)
DV
CC2
52 DV
CC2
60 Digital supply voltage, positive terminal.
DV
SS2
53 DV
SS2
61 Digital supply voltage, negative terminal.
P4.1 62 I/O General-purpose digital I/O
P4.0 63 I/O General-purpose digital I/O
P3.7 64 I/O General-purpose digital I/O
P3.6 65 I/O General-purpose digital I/O
P3.5 66 I/O General-purpose digital I/O
P3.4 67 I/O General-purpose digital I/O
P3.3/UCLK0 68 I/O
General-purpose digital I/O / external clock input—USART0/UART or
SPI mode, clock output—USART0/SPI mode
P3.2/SOMI0 69 I/O General-purpose digital I/O / slave out/master in of USART0/SPI mode
P3.1/SIMO0 70 I/O General-purpose digital I/O / slave in/master out of USART0/SPI mode
P3.0/STE0 71 I/O General-purpose digital I/O / slave transmit enable USART0/SPI mode
P2.7 72 I/O General-purpose digital I/O
P2.6/CAOUT 73 I/O General-purpose digital I/O / Comparator_A output
P2.5/URXD0 54 I/O P2.5/URXD0 74 I/O General-purpose digital I/O / receive data in—USART0/UART mode