Datasheet

Table Of Contents
MSP430x43x1, MSP430x43x, MSP430x44x1, MSP430x44x
MIXED SIGNAL MICROCONTROLLER
SLAS344G − JANUARY 2002 − REVISED OCTOBER 2009
31
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Timer_B7 (MSP430x44x(1) only)
Timer_B7 is a 16-bit timer/counter with seven capture/compare registers. Timer_B7 can support multiple
capture/compares, PWM outputs, and interval timing. Timer_B7 also has extensive interrupt capabilities.
Interrupts may be generated from the counter on overflow conditions and from each of the capture/compare
registers.
TIMER_B3/B7 SIGNAL CONNECTIONS
INPUT PIN NUMBER
DEVICE INPUT MODULE INPUT MODULE
MODULE
OUTPUT PIN NUMBER
PN PZ
DEVICE
INPUT
SIGNAL
MODULE
INPUT
NAME
MODULE
BLOCK
OUTPUT
SIGNAL
PN PZ
63 - P1.4 83 - P1.4 TBCLK TBCLK
ACLK ACLK
Timer
SMCLK SMCLK
Timer NA
63 - P1.4 83 - P1.4 TBCLK INCLK
58 - P2.1 78 - P2.1 TB0 CCI0A
58 - P2.1 78 - P2.1
58 - P2.1 78 - P2.1 TB0 CCI0B
CCR0
ADC12 (internal)
DV
SS
GND
CCR0
TB0
DV
CC
V
CC
57 - P2.2 77 - P2.2 TB1 CCI1A
57 - P2.2 77 - P2.2
57 - P2.2 77 - P2.2 TB1 CCI1B
CCR1
ADC12 (internal)
DV
SS
GND
CCR1
TB1
DV
CC
V
CC
56 - P2.3 76 - P2.3 TB2 CCI2A
56 - P2.3 76 - P2.3
56 - P2.3 76 - P2.3 TB2 CCI2B
CCR2
DV
SS
GND
CCR2
TB2
DV
CC
V
CC
67 - P3.4 TB3 CCI3A
67 - P3.4
67 - P3.4 TB3 CCI3B
CCR3
DV
SS
GND
CCR3 TB3
DV
CC
V
CC
66 - P3.5 TB4 CCI4A
66 - P3.5
66 - P3.5 TB4 CCI4B
CCR4
DV
SS
GND
CCR4 TB4
DV
CC
V
CC
65 - P3.6 TB5 CCI5A
65 - P3.6
65 - P3.6 TB5 CCI5B
CCR5
DV
SS
GND
CCR5 TB5
DV
CC
V
CC
64 - P3.7 TB6 CCI6A
64 - P3.7
ACLK (internal) CCI6B
CCR6
DV
SS
GND
CCR6 TB6
DV
CC
V
CC
Timer_B3 implements three capture/compare blocks (CCR0, CCR1 and CCR2 only).
Not implemented in MSP430x43x1 and MSP430x44x1 devices.