Datasheet

MAX5072
2.2MHz, Dual-Output Buck or Boost
Converter with POR and Power-Fail Output
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Pin Description (continued)
PIN NAME FUNCTION
28, 30 PGND
Power Ground. Connect rectifier diode anode, input capacitor negative, output capacitor negative, and
VL bypass capacitor returns to PGND.
29 SGND S i g nal G r ound . C onnect S G N D to the exp osed p ad . C onnect S G N D and P G N D tog ether at a si ng l e p oi nt.
31, 32
SOURCE2
Connection to the Converter 2 Internal MOSFET Source.
Buck Converter Operation—connect SOURCE2 to the switched side of the inductor as shown in Figure 1.
Boost Converter Operation—connect SOURCE2 to PGND (Figure 9).
EP SGND Exposed Paddle. Connect to SGND. Solder EP to the SGND plane for better thermal performance.
PGOOD1
VL
CLOCK
OUT
OUTPUT
2.5V/1A
OUTPUT
3.3V/2A
VL
VL
VL
PGND
SGND
PFO
SYSTEM
CLOCK
V
IN
= 5.5V TO 23V
µP RESET INPUT
32 31 30 29 28 27 26
9 101112131415
18
19
20
21
22
23
24
7
6
5
4
3
2
1
BST2/VDD2
CLKOUT
DRAIN2
DRAIN2
EN2
ON
OFF
FB2
COMP2
8
PFO
SOURCE2
PGND
SGND
SGND
PGND
SOURCE1
25
PGOOD1
FSEL1
EP
BST1/VDD1
DRAIN1
DRAIN1
EN1
FB1
COMP1
17
RST
BYPASS
VL
16
MR
MANUAL
RESET
VL
V+
OSC
PFI
SYNC
ON
OFF
VOUT1
DYING GASP
SGND*
MAX5072
*CONNECT PGND AND SGND TOGETHER AT ONE POINT NEAR THE
RETURN TERMINALS OF THE V+ AND VL BYPASS CAPACITORS.
Figure 1. MAX5072 Dual Buck Regulator Application Circuit