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General Description

The MAX5060/MAX5061 pulse-width modulation (PWM)

DC-DC controllers provide high-output-current capability

in a compact package with a minimum number of exter-

nal components. These devices utilize an average-cur-

rent-mode control that enables optimal use of low

DS(ON)

MOSFETs, eliminating the need for external

heatsinks even when delivering high output currents.

Differential sensing (MAX5060) enables accurate control

of the output voltage, while adaptive voltage positioning

provides optimum transient response. An internal regula-

tor enables operation with 4.75V to 5.5V or 7V to 28V

input voltage ranges. The high switching frequency, up

to 1.5MHz, allows the use of low-output inductor values

and input capacitor values. This accommodates the use

of PC-board-embedded planar magnetics.

The MAX5060 features a clock output with 180° phase

delay to control a second out-of-phase converter for

lower capacitor ripple currents. The MAX5060 also limits

the reverse current if the bus voltage becomes higher

than the regulated output voltage. The MAX5060 is

specifically designed to limit current sinking when multi-

ple power-supply modules are paralleled. The

MAX5060/MAX5061 offer an adjustable 0.6V to 5.5V out-

put voltage. The MAX5060 offers an overvoltage protec-

tion, power-good signal, and an output enable function.

The MAX5060/MAX5061 operate over the automotive

temperature range (-40°C to +125°C). The MAX5060 is

available in a 28-pin thin QFN package while the

MAX5061 is available in a 16-pin TSSOP package.

Applications

Servers and Workstations

Point-of-Load Telecom DC-DC Regulators

Networking Systems

RAID Systems

High-End Desktop Computers

Features

♦ 4.75V to 5.5V or 7V to 28V Input Voltage Range

♦ Adjustable Output Voltage from 0.6V to 5.5V

♦ Up to 30A Output Current

♦ Can Parallel Outputs For Higher Output Current

♦ Programmable Adaptive Output Voltage

Positioning

♦ True-Differential Remote Output Sensing

(MAX5060)

♦ Average-Current-Mode Control

• Superior Current Sharing Between Paralleled

Modules

• Accurate Current Limit Eliminates MOSFET

and Inductor Derating

♦ Limits Reverse Current Sinking in Paralleled

Modules (MAX5060)

♦ Programmable Switching Frequency from 125kHz

to 1.5MHz

♦ Integrated 4A Gate Drivers

♦ Clock Output for 180° Out-of-Phase Operation

(MAX5060)

♦ Voltage Signal Proportional to Output Current for

Load Monitoring (MAX5060)

♦ Output Overvoltage Crowbar Protection

(MAX5060)

♦ Programmable Hiccup Current-Limit Threshold

and Response Time

♦ Overtemperature Thermal Shutdown

MAX5060/MAX5061

0.6V to 5.5V Output, Parallelable,

Average-Current-Mode DC-DC Controllers

________________________________________________________________ Maxim Integrated Products 1

Ordering Information

Selector Guide

PART TEMP RANGE

PIN-PACKAGE

PKG

CODE

MAX5060ATI

-40°C to +125°C

28 TQFN-EP*

T2855-3

MAX5060ETI

-40°C to +85°C

28 TQFN-EP*

T2855-3

MAX5061AUE

-40°C to +125°C 16 TSSOP-EP*

U16E-3

MAX5061EUE

-40°C to +85°C 16 TSSOP-EP*

U16E-3

PART OUTPUT

MAX5060

Average-Current-Mode DC-DC Controller

for 5V/12V/24V Input Bus with CLKOUT,

Load Monitoring, Overvoltage, EN Input,

SYNC Input, and PGOOD Output

MAX5061

Average-Current-Mode DC-DC Controller

for 5V/12V/24V Input with SYNC/ENABLE

Input

19-3583; Rev 2; 7/05

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at

1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

Pin Configurations appear at end of data sheet.

*EP = Exposed pad.

EVALUATION KIT

AVAILABLE

Summary of content (31 pages)

PAGE 1
9-3583; Rev 2; 7/05 KIT ATION EVALU E L B A IL AVA 0.6V to 5.5V Output, Parallelable, Average-Current-Mode DC-DC Controllers The MAX5060/MAX5061 pulse-width modulation (PWM) DC-DC controllers provide high-output-current capability in a compact package with a minimum number of external components. These devices utilize an average-current-mode control that enables optimal use of low RDS(ON) MOSFETs, eliminating the need for external heatsinks even when delivering high output currents.
PAGE 2
MAX5060/MAX5061 0.6V to 5.5V Output, Parallelable, Average-Current-Mode DC-DC Controllers ABSOLUTE MAXIMUM RATINGS IN to SGND.............................................................-0.3V to +30V BST to SGND..........................................................-0.3V to +35V DH to LX .......................................-0.3V to [(VBST - VLX_) + 0.3V] DL to PGND (MAX5060).............................-0.3V to (VDD + 0.3V) DL to PGND (MAX5061).............................-0.3V to (VCC + 0.
PAGE 3
0.6V to 5.5V Output, Parallelable, Average-Current-Mode DC-DC Controllers (VCC = 5V, VDD = VCC (MAX5060 only), TA = TJ = TMIN to TMAX, unless otherwise noted. Typical specifications are at TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 1500 kHz OSCILLATOR Switching Frequency Range Switching Frequency 125 fSW Switching Frequency Accuracy CLKOUT Phase Shift (MAX5060) φCLKOUT RT = 500kΩ 121 125 129 RT = 120kΩ 495 521 547 RT = 39.
PAGE 4
MAX5060/MAX5061 0.6V to 5.5V Output, Parallelable, Average-Current-Mode DC-DC Controllers ELECTRICAL CHARACTERISTICS (continued) (VCC = 5V, VDD = VCC (MAX5060 only), TA = TJ = TMIN to TMAX, unless otherwise noted. Typical specifications are at TA = +25°C.
PAGE 5
0.6V to 5.5V Output, Parallelable, Average-Current-Mode DC-DC Controllers (VCC = 5V, VDD = VCC (MAX5060 only), TA = TJ = TMIN to TMAX, unless otherwise noted. Typical specifications are at TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 2.5 2.562 V 16.5 µA ENABLE INPUTS EN Input High Voltage (MAX5060) VEN EN rising 2.437 EN Input Hysteresis (MAX5060) EN Pullup Current (MAX5060) 0.28 IEN 13.5 RT/SYNC/EN Input High Voltage Enable (MAX5061) VRT/SYNC/EN_H 1.
PAGE 6
Typical Operating Characteristics (TA = +25°C, Figures 1 and 2, unless otherwise noted.) EFFICIENCY vs. OUTPUT CURRENT AND INPUT VOLTAGE 60 60 50 50 60 50 40 40 30 30 30 20 20 VOUT = 3.3V fSW = 250kHz 20 VOUT = 0.6V fSW = 250kHz 10 0 4 6 8 10 12 14 16 18 20 0 0 2 4 6 10 12 14 16 18 20 8 OUTPUT CURRENT (A) OUTPUT CURRENT (A) EFFICIENCY vs. OUTPUT CURRENT AND OUTPUT VOLTAGE EFFICIENCY vs. OUTPUT CURRENT AND OUTPUT VOLTAGE 80 90 80 70 60 VOUT = 0.
PAGE 7
0.6V to 5.5V Output, Parallelable, Average-Current-Mode DC-DC Controllers OUTPUT VOLTAGE vs. OUTPUT CURRENT AND ERROR AMPLIFIER GAIN (RF/RIN) VV_IOUT (V) 2.0 RF/RIN = 10 0 100 2 4 6 MAX5060 toc12 VIN = 5V 4.85 0 10 12 14 16 18 20 VIN = 12V 4.95 0 8 5.05 VIN = 24V 0.5 5 10 4.75 20 15 0 25 50 75 100 125 OUTPUT CURRENT (A) LOAD CURRENT (A) VCC LOAD CURRENT (mA) DRIVER RISE TIME vs. DRIVER LOAD CAPACITANCE DRIVER FALL TIME vs.
PAGE 8
MAX5060/MAX5061 0.6V to 5.5V Output, Parallelable, Average-Current-Mode DC-DC Controllers Typical Operating Characteristics (continued) (TA = +25°C, Figures 1 and 2, unless otherwise noted.) LOW-SIDE DRIVER (DL) RISE TIME LOW-SIDE DRIVER (DL) FALL TIME MAX5060 toc19 MAX5060 toc21 CLOAD = 22nF VIN = 12V CLOAD = 22nF VIN = 12V 2V/div 40ns/div VIN = 12V VOUT = 1.
PAGE 9
0.6V to 5.5V Output, Parallelable, Average-Current-Mode DC-DC Controllers REVERSE CURRENT SINK AT ENABLE TURN-ON (VIN = 12V, VOUT = 1.5V, VEXTERNAL = 2.0V) REVERSE CURRENT SINK AT ENABLE TURN-ON (VIN = 12V, VOUT = 1.5V, VEXTERNAL = 3.3V) 2A/div FREQUENCY vs. RT 10,000 5A/div MAX5060 toc30 MAX5060 toc29 fSW (kHz) MAX5060 toc28 VIN = 12V 1000 100 200µs/div 30 200µs/div 110 70 190 150 270 230 350 310 510 430 390 470 RT (kΩ) FREQUENCY vs.
PAGE 10
0.6V to 5.5V Output, Parallelable, Average-Current-Mode DC-DC Controllers MAX5060/MAX5061 Pin Description PIN 10 NAME FUNCTION MAX5060 MAX5061 1 3 PGND 2, 7 8 N.C. 3 4 DL Low-Side Gate-Driver Output. Synchronous MOSFET gate driver. 4 5 BST Boost Flying-Capacitor Connection. Reservoir capacitor connection for the highside MOSFET driver supply. Connect a 0.47µF ceramic capacitor between BST and LX. 5 6 LX Inductor Connection. Source connection for the high-side MOSFETs.
PAGE 11
0.6V to 5.5V Output, Parallelable, Average-Current-Mode DC-DC Controllers PIN NAME FUNCTION MAX5060 MAX5061 17 12 EAOUT 18 13 EAN Voltage-Error-Amplifier Inverting Input. Receives a signal from the output of the differential remote-sense amplifier (MAX5060). Connect the center tap of the resistor-divider from the output to SGND (MAX5061). 19 — DIFF Differential Remote-Sense Amplifier Output. DIFF is the output of a precision unity-gain amplifier whose inputs are SENSE+ and SENSE-.
PAGE 12
0.6V to 5.5V Output, Parallelable, Average-Current-Mode DC-DC Controllers MAX5060/MAX5061 Typical Application Circuit VIN = 12V C1, C2 R13 IN RH C3 VIN IN REXT SENSE- SENSE+ CSN CSP DH LIM Q1 RL C3–C7 L1 C4 R1 LX DL EN ON OFF V_IOUT (VOLTAGE α IOUT) C5 C12 Q2 C12 C13 D1 LOAD MAX5060 RIN V_IOUT BST OVI VCC D3 C10 DIFF VDD EAOUT RF CLP C11 R3 EAN RT/ PGND SGND PGOOD SYNC C8 SYNC R5 C6 C7 R11 PGOOD Figure 1.
PAGE 13
0.6V to 5.5V Output, Parallelable, Average-Current-Mode DC-DC Controllers VIN = 12V C1, C2 R13 IN C13* RC1 C3 VIN CSN IN VCC CSP RC2 RT/SYNC/EN SYNC OFF C13–C16 L1 RT VOUT = 0.6V TO 5.5V AT 20A R1 LX MAX5061 ON Q1 DH C12 Q2 DL C10 C11 D1 REXT LOAD C4 LIM D3 BST VCC C5 VCC R5 C7* C8 C9 CLP C6 PGND SGND EAN EAOUT RF RH RL * USE C13 = 47pf AND C7 = 4.7µF/6.3V (CERAMIC). Figure 2.
PAGE 14
0.6V to 5.5V Output, Parallelable, Average-Current-Mode DC-DC Controllers MAX5060/MAX5061 Block Diagram VCC IS EN 0.5V x VCC 5V LDO REGULATOR IN VCC UVLO POR TEMP SENSOR TO INTERNAL CIRCUITS LIM HICCUP MODE CURRENT LIMIT 126.7kΩ MAX5060 VCM 100kΩ 0.5 x VCLAMP CLP CA CSN Q R Q RT Ct AV = 34.
PAGE 15
0.6V to 5.5V Output, Parallelable, Average-Current-Mode DC-DC Controllers VCC IS 0.5V x VCC 5V LDO REGULATOR IN VCC UVLO POR TEMP SENSOR TO INTERNAL CIRCUITS LIM HICCUP MODE CURRENT LIMIT 126.7kΩ MAX5061 VCM 100kΩ 0.5 x VCLAMP CLP CA CSN VCLAMP HIGH CLK RAMP GENERATOR Q RT gm = 500µS SGND OSCILLATOR R VCM PWM COMPARATOR CEA RT/SYNC/EN Q Ct AV = 34.5 CSP S RAMP CPWM VCC S Q BST DH LX 2 x fS (V/s) R Q DL PGND EAOUT ERROR AMP EAN VEA SOFTSTART VREF = 0.
PAGE 16
MAX5060/MAX5061 0.6V to 5.5V Output, Parallelable, Average-Current-Mode DC-DC Controllers Detailed Description The MAX5060/MAX5061 are high-performance averagecurrent-mode PWM controllers. The average-currentmode control technique offers inherently stable operation, reduces component derating and size by accurately controlling the inductor current. This also improves the current-sharing accuracy when paralleling multiple converters.
PAGE 17
0.6V to 5.5V Output, Parallelable, Average-Current-Mode DC-DC Controllers RT = Synchronization The MAX5060/MAX5061 can be easily synchronized by connecting an external clock to RT/SYNC (MAX5060) or RT/SYNC/EN (MAX5061). If an external clock is present, then the internal oscillator is disabled and the external clock is used to run the MAX5060/MAX5061. If the external clock is removed, the absence of clock for 32µs is detected and the circuit starts switching from the internal oscillator.
PAGE 18
MAX5060/MAX5061 0.6V to 5.5V Output, Parallelable, Average-Current-Mode DC-DC Controllers Control Loop The MAX5060/MAX5061 use an average-current-mode control scheme to regulate the output voltage (Figure 5). The main control loop consists of an inner current loop and an outer voltage loop. The inner loop controls the output current (IPHASE), while the outer loop controls the output voltage.
PAGE 19
0.6V to 5.5V Output, Parallelable, Average-Current-Mode DC-DC Controllers Peak-Current Comparator The peak-current comparator provides a path for fast cycle-by-cycle current limit during extreme fault conditions such as an output inductor malfunction (Figure 5). Note the average current-limit threshold of 26.9mV still limits the output current during short-circuit conditions.
PAGE 20
where ∆IL = peak-to-peak inductor current. Choose RC2 = 10Ω, V CC = 5.1V, and R SENSE is a currentsense resistor. Note that the current limit of MAX5061 is reduced by 3mV / RSENSE. The no-load output voltage depends on the RH, RF, VREF (0.6V) and the fixed DC bias voltage at CSP CSN. The following equation assumes a 3mV bias voltage at CSP - CSN. V V − 0.1 VOUT(NL) = [( REF + REF ) × RH ] + VREF RL RF VOLTAGE-POSITIONING WINDOW MAX5060/MAX5061 0.6V to 5.
PAGE 21
0.6V to 5.5V Output, Parallelable, Average-Current-Mode DC-DC Controllers PGOOD Generator (MAX5060) A PGOOD comparator compares the differential amplifier output (DIFF) against 0.90 times the set output voltage for undervoltage monitoring (see Figure 8). Use a 10kΩ pullup resistor from PGOOD to a voltage source less than or equal to VCC. Current Limit The VEA output is clamped to 930mV with respect to the common-mode voltage (VCM).
PAGE 22
MAX5060/MAX5061 0.6V to 5.5V Output, Parallelable, Average-Current-Mode DC-DC Controllers To drive multiple converters out-of-phase, use a delay circuit to set 90° of phase shift (4 paralleled converters), or 60° of phase shift (6 converters in parallel). Designate one converter as master and the remaining converters as slaves. Connect the master and slave controllers in a daisy-chain configuration as shown in Figure 11.
PAGE 23
0.6V to 5.5V Output, Parallelable, Average-Current-Mode DC-DC Controllers SENSE+ 90° PHASE DELAY CIRCUIT CSN CSN RT/SYNC CSP CSP VIN VIN IN DIFF MAX5060/MAX5061 SENSE- MAX5060 VIN DH IN MAX5060 DIFF LX EAN DH LX EAN EAOUT DL PGND SGND CLKOUT DL EAOUT RT/SYNC PGND SGND CSN RT/SYNC CSP VIN IN MAX5060 DIFF DH LX EAN EAOUT DL PGND SGND CLKOUT VOUT LOAD 90° PHASE DELAY CIRCUIT CSN RT/SYNC CSP VIN IN MAX5060 DIFF DH LX EAN DL EAOUT PGND SGND Figure 11.
PAGE 24
MAX5060/MAX5061 0.6V to 5.5V Output, Parallelable, Average-Current-Mode DC-DC Controllers Applications Information Inductor Selection The switching frequency, peak inductor current, and allowable ripple at the output determine the value and size of the inductor. Selecting higher switching frequencies reduces the inductance requirement, but at the cost of lower efficiency. The charge/discharge cycle of the gate and drain capacitances in the switching MOSFETs create switching losses.
PAGE 25
0.6V to 5.5V Output, Parallelable, Average-Current-Mode DC-DC Controllers (I DC + I PK + I 2 2 ) DC × IPK × D 3 ESRIN = where D = VOUT/VIN, IDC = (IOUT - ∆IL/2) and IPK = (IOUT + ∆IL/2). PDMOS −LO = (QG × VDD × fSW ) + 2 2 × C  2 OSS × VIN × fSW + 1.4R   DS(ON) × I RMS −LO 3   ( IRMS −LO = (I DC + I PK + I 2 2 ) DC × IPK × ) (1 − D) 3 where COSS is the MOSFET drain-to-source capacitance. For example, from the typical specifications in the Applications Information section with VOUT = 1.
PAGE 26
MAX5060/MAX5061 0.6V to 5.5V Output, Parallelable, Average-Current-Mode DC-DC Controllers Keep the maximum output voltage deviation less than or equal to the adaptive voltage-positioning window (∆VOUT). Assume 50% contribution each from the output capacitance discharge and the ESR drop. Use the following equations to calculate the required ESR and capacitance value: ∆VESR ISTEP × tRESPONSE I COUT = STEP ∆VQ ESROUT = 100% of the average current-limit value.
PAGE 27
0.6V to 5.5V Output, Parallelable, Average-Current-Mode DC-DC Controllers RCF ≤ fSW × L × 102 VOUT × RS CCF provides a low-frequency pole while RCF provides a midband zero. Place a zero (fZ) to obtain a phase bump at the crossover frequency. Place a high-frequency pole (f P ) at least a decade away from the crossover frequency to reduce the influence of the switching noise and achieve maximum phase margin.
PAGE 28
0.6V to 5.5V Output, Parallelable, Average-Current-Mode DC-DC Controllers MAX5060/MAX5061 Pin Configurations CSP CSN DIFF EAN EAOUT CLP OVI TOP VIEW 21 20 19 18 17 16 15 SGND 22 14 LIM SENSE- 23 13 V_IOUT IN 1 VCC 2 15 CSP PGND 3 14 CSN SENSE+ 24 12 RT/SYNC SGND 25 11 EN IN 26 10 PGOOD LX 6 VCC 27 9 CLKOUT DH 7 EXPOSED PAD 28 1 2 3 4 5 6 7 N.C. DL BST LX DH N.C. 8 PGND VDD MAX5060 SGND 16 SGND DL 4 MAX5061 12 EAOUT BST 5 N.C.
PAGE 29
0.6V to 5.5V Output, Parallelable, Average-Current-Mode DC-DC Controllers QFN THIN.EPS D2 D MARKING b CL 0.10 M C A B D2/2 D/2 k L AAAAA E/2 E2/2 CL (NE-1) X e E DETAIL A PIN # 1 I.D. e/2 E2 PIN # 1 I.D. 0.35x45° e (ND-1) X e DETAIL B e L1 L CL CL L L e e 0.10 C A C 0.08 C A1 A3 PACKAGE OUTLINE, 16, 20, 28, 32, 40L THIN QFN, 5x5x0.
PAGE 30
MAX5060/MAX5061 0.6V to 5.5V Output, Parallelable, Average-Current-Mode DC-DC Controllers Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) COMMON DIMENSIONS EXPOSED PAD VARIATIONS PKG. 16L 5x5 20L 5x5 28L 5x5 32L 5x5 40L 5x5 SYMBOL MIN. NOM. MAX. MIN. NOM. MAX. MIN. NOM. MAX. MIN. NOM. MAX. MIN. NOM. MAX. A A1 A3 b D E e 0.70 0.75 0.80 0.70 0.75 0.
PAGE 31
0.6V to 5.5V Output, Parallelable, Average-Current-Mode DC-DC Controllers TSSOP 4.4mm BODY.EPS XX XX PACKAGE OUTLINE, TSSOP, 4.40 MM BODY, EXPOSED PAD 21-0108 E 1 1 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.