Inc. Recording Equipment User Manual
Table Of Contents
- Features
- Applications
- General Description
- Basic Block Diagram
- Revision History
- Specifications
- Absolute Maximum Ratings
- Pin Configuration and Function Descriptions
- Typical Performance Characteristics
- Input/Output Termination Recommendations
- Theory of Operation
- Thermal Performance
- Power-Up
- Power Supply Partitioning
- Serial Control Port
- I/O Register Map
- I/O Register Descriptions
- Serial Port Configuration (Register 0x0000 to Register 0x0005)
- Power-Down and Reset (Register 0x0010 to Register 0x0013)
- System Clock (Register 0x0020 to Register 0x0022)
- CMOS Output Divider (S-Divider) (Register 0x0100 to Register 0x0106)
- Frequency Tuning Word (Register 0x01A0 to Register 0x01AD)
- Register 0x01A0 to Register 0x01A5—Reserved
- Register 0x01A6—FTW0 (Frequency Tuning Word)
- Register 0x01A7—FTW0 (Frequency Tuning Word) (Continued)
- Register 0x01A8—FTW0 (Frequency Tuning Word) (Continued)
- Register 0x01A9—FTW0 (Frequency Tuning Word) (Continued)
- Register 0x01AA—FTW0 (Frequency Tuning Word) (Continued)
- Register 0x01AB—FTW0 (Frequency Tuning Word) (Continued)
- Register 0x01AC—Phase
- Register 0x01AD—Phase (Continued)
- Doubler and Output Drivers (Register 0x0200 to Register 0x0201)
- Calibration (User-Accessible Trim) (Register 0x0400 to Register 0x0410)
- Harmonic Spur Reduction (Register 0x0500 to Register 0x0509)
- Outline Dimensions
AD9912
Rev. D | Page 31 of 40
Addr
(Hex)
Type
1
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Default
(Hex)
Calibration (user-accessible trim)
0x0400
to
0x040A
Reserved 0x00
0x040B
DAC full-
scale
current
DAC full-scale current, Bits[7:0] 0xFF
0x040C
DAC full-scale current,
Bits[9:8]
0x01
0x040D Reserved 0x00
0x040E Reserved 0x10
0x040F
and
0x0410
Reserved 0x00
Harmonic spur reduction
0x0500 M Spur A
HSR-A
enable
Amplitude
gain × 2
Spur A harmonic, Bits[3:0] 0x00
0x0501 M Spur A magnitude, Bits[7:0] 0x00
0x0503 M Spur A phase, Bits[7:0] 0x00
0x0504 M
Spur A
phase, Bit 8
0x00
0x0505 M Spur B
HSR-B
enable
Amplitude
gain × 2
Spur B harmonic, Bits[3:0] 0x00
0x0506 M Spur B magnitude, Bits[7:0] 0x00
0x0508 M Spur B phase, Bits[7:0] 0x00
0x0509 M
Spur B
phase, Bit 8
0x00
1
Types of registers: M = mirrored (also called buffered). This type of register needs an I/O update for the new value to take effect; RO = read-only; AC = autoclear.