Datasheet

XIO2001
SCPS212G –MAY 2009–REVISED DECEMBER 2012 www.ti.com
7.3 Nominal Power Consumption
DEVICES POWER STATE
(1)
VOLTS AMPERES WATTS
1.5 0.147 0.221
No downstream PCI devices D0 idle
3.3 0.062 0.205
Totals: 0.209 0.426
1.5 0.148 0.222
One downstream PCI device D0 idle
3.3 0.077 0.254
Totals: 0.225 0.476
1.5 0.157 0.236
One downstream PCI device D0 active
3.3 0.165 0.545
Totals: 0.322 0.780
1.65 0.168 0.277
One downstream (max voltage) D0 active 3.6 0.188 0.677
Totals: 0.356 0.954
(1) D0 idle power state: Downstream PCI device is in PCI state D0. Downstream device driver is loaded. Downstream device is not actively
transferring data.
D0 active power state: Downstream PCI device is in PCI state D0. Downstream device driver is loaded. Downstream device is acitvely
transferring data (worst case scenario).
7.4 PCI Express Differential Transmitter Output Ranges
PARAMETER TERMINALS MIN NOM MAX UNIT COMMENTS
UI
(1)
Each UI is 400 ps ±300 ppm. UI does not account for SSC
TXP, TXN 399.88 400 400.12 ps
Unit interval dictated variations.
V
TX-DIFF-PP
TXP, TXN 0.8 1.2 V V
TX-DIFF-PP
= 2*|V
TXP
– V
TXN
|
Differential peak-to-peak output voltage
V
TX-DIFF-PP-LOW
Low-power differential peak-to-peak TX TXP, TXN 0.4 1.2 V V
TX-DIFF-PP
= 2*|V
TXP
– V
TXN
|
voltage swing
This is the ratio of the V
TX-DIFF-PP
of the second and
V
TX-DE-RATIO-3.5dB
TXP, TXN 3 4 dB following bits after a transition divided by the V
TX-DIFF-PP
of
TX de-emphasis level ratio
the first bit after a transition.
T
TX-EYE
(2) (3) (4)
TXP, TXN 0.75 UI
Does not include SSC or Ref
CLK
jitter. Includes R
j
at 10
–12
.
Minimum TX eye width
T
TX-EYE-MEDIAN-to-MAX-JITTER
(2)
Measured differentially at zero crossing points after
Maximum time between the jitter median TXP, TXN 0.125 UI
applying the 2.5 GT/s clock recovery function.
and maximum deviation from the median
T
TX-RISE-FALL
(2)
TXP, TXN 0.125 UI Measured differentially from 20% to 80% of swing.
TX output rise/fall time
BW
TX-PLL
(5)
TXP, TXN 22 MHz Second order PLL jitter transfer bounding function.
Maximum TX PLL bandwidth
BW
TX-PLL-LO-3DB
(5) (6)
TXP, TXN 1.5 MHz Second order PLL jitter transfer bounding function.
Minimum TX PLL bandwidth
RL
TX-DIFF
Tx package plus Si differential return TXP, TXN 10 dB
loss
RL
TX-CM
Tx package plus Si common mode return TXP, TXN 6 dB Measured over 0.05–1.25 GHz range
loss
Z
TX-DIFF_DC
TXP, TXN 80 120 Ω Low impedance defined during signaling.
DC differential TX impedance
(1) SCC permits a 0, –5000 ppm modulation of the clock frequency at a modulation rate not to exceed 33 kHz.
(2) Measurements at 2.5 GT/s require a scope with at least 6.2 GHz bandwidth. 2.5 GT/s may be measured within 200 mils of Tx device's
pins, although deconvolution is recommended.
(3) Transmitter jitter is measured by driving the transmitter under test with a low jitter "ideal" clock and connecting the DUT to a reference
board.
(4) Transmitter raw jitter data must be convolved with a filtering function that represents the worst case CDR tracking BW. After the
convolution process has been applied, the center of the resulting eye must be determined and used as a reference point for obtaining
eye voltage and margins.
(5) The Tx PLL Bandwidth must lie between the min and max ranges given in the above table. PLL peaking must lie below the value listed
above. Note: the PLL B/W extends from zero up to the value(s) specified in the above table.
(6) A single combination of PLL BW and peaking is specified for 2.5 GT/s implemenations.
116 Electrical Characteristics Copyright © 2009–2012, Texas Instruments Incorporated
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