Datasheet
Table Of Contents
- Title Page - SLWS106H
- IMPORTANT NOTICE
- Contents
- List of Illustrations
- 1 Introduction
- 2 Specifications
- 2.1 Absolute Maximum Ratings Over Operating Free-Air Temperature Range (unless otherwise noted)†
- 2.2 Recommended Operating Conditions
- 2.3 Electrical Characteristics Over Recommended Operating Conditions, AVDD, HPVDD, BVDD = 3.3 V, DVDD = 1.5 V, Slave Mode, XTI/ MCLK = 256fs, fs = 48 kHz ( unless otherwise stated)
- 2.4 Digital-Interface Timing
- 3 How to Use the TLV320AIC23B
- Appendix A: Mechanical Data
3−9
3.3.2 Audio Sampling Rates
The TLV320AIC23B can operate in master or slave clock mode. In the master mode, the TLV320AIC23B clock and
sampling rates are derived from a 12-MHz MCLK signal. This 12-MHz clock signal is compatible with the USB
specification. The TLV320AIC23B can be used directly in a USB system.
In the slave mode, an appropriate MCLK or crystal frequency and the sample rate control register settings control
the TLV320AIC23B clock and sampling rates.
The settings in the sample rate control register control the clock mode and sampling rates.
Sample Rate Control (Address: 0001000)
BIT D8 D7 D6 D5 D4 D3 D2 D1 D0
Function X CLKOUT CLKIN SR3 SR2 SR1 SR0 BOSR USB/Nor-
mal
Default 0 0 0 1 0 0 0 0 0
CLKOUT Clock output divider 0 = MCLK 1 = MCLK/2
CLKIN Clock input divider 0 = MCLK 1 = MCLK/2
SR[3:0] Sampling rate control (see Sections 3.3.2.1 and 3.3.2.2)
BOSR Base oversampling rate
USB mode: 0 = 250 f
s
1 = 272 f
s
Normal mode: 0 = 256 f
s
1 = 384 f
s
USB/Normal Clock mode select: 0 = Normal 1 = USB
X Reserved
The clock circuit of the AIC23B has two internal dividers. The first, controlled by CLKIN, applies to the sampling-rate
generator of the codec. The second, controlled by CLKOUT, applies only to the CLKOUT terminal. By setting CLKIN
to 1, the entire codec is clocked with half the frequency, effectively dividing the resulting sampling rates by two. The
following sampling-rate tables are based on CLKIN = MCLK.
3.3.2.1 USB-Mode Sampling Rates (MCLK = 12 MHz)
In the USB mode, the following ADC and DAC sampling rates are available:
SAMPLING RATE
†
SAMPLING-RATE CONTROL SETTINGS
ADC
DAC
FILTER TYPE
SAMPLING-RATE CONTROL SETTINGS
ADC
(kHz)
DAC
(kHz)
FILTER TYPE
SR3 SR2 SR1 SR0 BOSR
96 96 3 0 1 1 1 0
88.2 88.2 2 1 1 1 1 1
48 48 0 0 0 0 0 0
44.1 44.1 1 1 0 0 0 1
32 32 0 0 1 1 0 0
8.021 8.021 1 1 0 1 1 1
8 8 0 0 0 1 1 0
48 8 0 0 0 0 1 0
44.1 8.021 1 1 0 0 1 1
8 48 0 0 0 1 0 0
8.021 44.1 1 1 0 1 0 1
†
The sampling rates are derived from the 12-MHz master clock. The available oversampling rates do not produce exactly 8-kHz, 44.1-kHz, and
88.2-kHz sampling rates, but 8.021 kHz, 44.117 kHz, and 88.235 kHz, respectively. See Figures 3−17 through 3−34 for filter responses