Datasheet

ST7LITE0xY0, ST7LITESxY0
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LITE TIMER (Cont’d)
Figure 32. Watchdog Timing Diagram
t
WDG
f
WDG
INTERNAL
WATCHDOG
RESET
WDGD BIT
SOFTWARE SETS
WDGD BIT
HARDWARE CLEARS
WDGD BIT
WATCHDOG RESET
(2ms @ 8 MHz f
OSC
)
1