Datasheet

ST7LITE0xY0, ST7LITESxY0
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REGISTER AND MEMORY MAP (Cont’d)
Legend: x=undefined, R/W=read/write
Table 2. Hardware Register Map
Address Block
Register
Label
Register Name
Reset
Status
Remarks
0000h
0001h
0002h
Port A
PADR
PADDR
PAOR
Port A Data Register
Port A Data Direction Register
Port A Option Register
00h
1)
00h
40h
R/W
R/W
R/W
0003h
0004h
0005h
Port B
PBDR
PBDDR
PBOR
Port B Data Register
Port B Data Direction Register
Port B Option Register
E0h
1)
00h
00h
R/W
R/W
R/W
2)
0006h to
000Ah
Reserved area (5 bytes)
000Bh
000Ch
LITE
TIMER
LTCSR
LTICR
Lite Timer Control/Status Register
Lite Timer Input Capture Register
xxh
xxh
R/W
Read Only
000Dh
000Eh
000Fh
0010h
0011h
0012h
0013h
AUTO-RELOAD
TIMER
ATCSR
CNTRH
CNTRL
ATRH
ATRL
PWMCR
PWM0CSR
Timer Control/Status Register
Counter Register High
Counter Register Low
Auto-Reload Register High
Auto-Reload Register Low
PWM Output Control Register
PWM 0 Control/Status Register
00h
00h
00h
00h
00h
00h
00h
R/W
Read Only
Read Only
R/W
R/W
R/W
R/W
0014h to
0016h
Reserved area (3 bytes)
0017h
0018h
AUTO-RELOAD
TIMER
DCR0H
DCR0L
PWM 0 Duty Cycle Register High
PWM 0 Duty Cycle Register Low
00h
00h
R/W
R/W
0019h to
002Eh
Reserved area (22 bytes)
0002Fh FLASH FCSR Flash Control/Status Register 00h R/W
00030h EEPROM EECSR Data EEPROM Control/Status Register 00h R/W
0031h
0032h
0033h
SPI
SPIDR
SPICR
SPICSR
SPI Data I/O Register
SPI Control Register
SPI Control/Status Register
xxh
0xh
00h
R/W
R/W
R/W
0034h
0035h
0036h
ADC
ADCCSR
ADCDR
ADCAMP
A/D Control Status Register
A/D Data Register
A/D Amplifier Control Register
00h
00h
00h
R/W
Read Only
R/W
0037h ITC EICR External Interrupt Control Register 00h R/W
0038h
0039h
CLOCKS
MCCSR
RCCR
Main Clock Control/Status Register
RC oscillator Control Register
00h
FFh
R/W
R/W
1