User guide

Chapter 17
Timer and Counter Instructions
17–4
Timer Off–Delay TOF Output Instruction
(TOF)
(EN)
(DN)
TOF
TIMER OFF DELAY
Timer T4:1
Time Base 0.01
Preset 120
Accum 0
HHT Ladder Display:
HHT Zoom Display:
Ladder Diagrams and APS Displays:
F1 F2 F3 F4 F5
ZOOM on TOF –(TOF)– 2.0.0.0.2
NAME: TIMER OFF DELAY
TIMER: T4:1 TIME BASE .01 SEC
PRESET: 120
ACCUM: 0
EN TT DN
0 0 0
EDT_DAT
(online monitor mode)
Operation: The TOF instruction begins to count timebase intervals when
the rung makes a true-false transition. As long as rung conditions remain
false, the timer increments its accumulated value (ACC) each scan until it
reaches the preset value (PRE). The accumulated value is reset when rung
conditions go true regardless of whether the timer has timed out.
Status Bits
The done bit (DN) is reset when the accumulated value is equal to the preset
value. It is set when rung conditions become true.
The timing bit (TT) is set when rung conditions are false and the
accumulated value is less than the preset value. It is reset when the rung
conditions go true or when the done bit is reset.
The enable bit (EN) is set when rung conditions are true; it is reset when
rung conditions become false.
Effects of processor mode changes: When processor operation changes
from the Run or Test mode to the Program mode or user power is lost while a
timer off-delay instruction is timing but has not reached its preset value, the
following occurs:
• Timer enable bit remains reset.
• Timing and done bits remain set.
• The accumulated value remains the same.
Timer Off-Delay (TOF)