Datasheet

2010-2016 Microchip Technology Inc. DS40001412G-page 325
PIC18(L)F2X/4XK22
REGISTER 19-3: CTMUICON: CTMU CURRENT CONTROL REGISTER
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
ITRIM<5:0> IRNG<1:0>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-2 ITRIM<5:0>: Current Source Trim bits
011111 = Maximum positive change from nominal current
011110
.
.
.
000001 = Minimum positive change from nominal current
000000 = Nominal current output specified by IRNG<1:0>
111111 = Minimum negative change from nominal current
.
.
.
100010
100001 = Maximum negative change from nominal current
bit 1-0 IRNG<1:0>: Current Source Range Select bits (see Table 27-4)
11 = 100 Base current
10 = 10 Base current
01 = Base current level
00 = Current source disabled
TABLE 19-1: REGISTERS ASSOCIATED WITH CTMU MODULE
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values
on Page
CTMUCONH CTMUEN
CTMUSIDL TGEN EDGEN EDGSEQEN IDISSEN CTTRIG 323
CTMUCONL EDG2POL EDG2SEL<1:0> EDG1POL EDG1SEL<1:0> EDG2STAT EDG1STAT
324
CTMUICON ITRIM<5:0> IRNG<1:0>
325
IPR3
SSP2IP BCL2IP RC2IP TX2IP CTMUIP TMR5GIP TMR3GIP TMR1GIP
123
PIE3
SSP2IE BCL2IE RC2IE TX2IE CTMUIE TMR5GIE TMR3GIE TMR1GIE
119
PIR3
SSP2IF BCL2IF RC2IF TX2IF CTMUIF TMR5GIF TMR3GIF TMR1GIF
114
PMD2
CTMUMD
CMP2MD CMP1MD ADCMD
54
Legend: — = unimplemented, read as ‘0’. Shaded bits are not used during CTMU operation.