Datasheet

PIC18(L)F2X/4XK22

DS40001412G-page 114  2010-2016 Microchip Technology Inc.

R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0

SSP2IF BCL2IF RC2IF TX2IF CTMUIF TMR5GIF TMR3GIF TMR1GIF

bit 7 bit 0

Legend:

R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’

-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown

bit 7 SSP2IF: Synchronous Serial Port Interrupt Flag bit

1 = The transmission/reception is complete (must be cleared in software)

0 = Waiting to transmit/receive

bit 6 BCL2IF: MSSP2 Bus Collision Interrupt Flag bit

1 = A bus collision has occurred while the SSP2 module configured in I

C master was transmitting

(must be cleared in software)

0 = No bus collision occurred

bit 5 RC2IF: EUSART2 Receive Interrupt Flag bit

1 = The EUSART2 receive buffer, RCREG2, is full (cleared by reading RCREG2)

0 = The EUSART2 receive buffer is empty

bit 4 TX2IF: EUSART2 Transmit Interrupt Flag bit

1 = The EUSART2 transmit buffer, TXREG2, is empty (cleared by writing TXREG2)

0 = The EUSART2 transmit buffer is full

bit 3 CTMUIF: CTMU Interrupt Flag bit

1 = CTMU interrupt occurred (must be cleared in software)

0 = No CTMU interrupt occurred

bit 2 TMR5GIF: TMR5 Gate Interrupt Flag bits

1 = TMR gate interrupt occurred (must be cleared in software)

0 = No TMR gate occurred

bit 1 TMR3GIF: TMR3 Gate Interrupt Flag bits

1 = TMR gate interrupt occurred (must be cleared in software)

0 = No TMR gate occurred

bit 0 TMR1GIF: TMR1 Gate Interrupt Flag bits

1 = TMR gate interrupt occurred (must be cleared in software)

0 = No TMR gate occurred