Datasheet

 2010 Microchip Technology Inc. Preliminary DS39964B-page 489
PIC18F47J53 FAMILY
RCALL Relative Call
Syntax: RCALL n
Operands: -1024  n  1023
Operation: (PC) + 2  TOS,
(PC) + 2 + 2n  PC
Status Affected: None
Encoding: 1101 1nnn nnnn nnnn
Description: Subroutine call with a jump up to 1K
from the current location. First, return
address (PC + 2) is pushed onto the
stack. Then, add the 2’s complement
number ‘2n’ to the PC. Since the PC will
have incremented to fetch the next
instruction, the new address will be
PC + 2 + 2n. This instruction is a
two-cycle instruction.
Words: 1
Cycles: 2
Q Cycle Activity:
Q1 Q2 Q3 Q4
Decode Read literal
‘n’
PUSH PC
to stack
Process
Data
Write to PC
No
operation
No
operation
No
operation
No
operation
Example:
HERE RCALL Jump
Before Instruction
PC = Address (HERE)
After Instruction
PC = Address (Jump)
TOS = Address (HERE + 2)
RESET Reset
Syntax: RESET
Operands: None
Operation: Reset all registers and flags that are
affected by a MCLR
Reset.
Status Affected: All
Encoding: 0000 0000 1111 1111
Description: This instruction provides a way to
execute a MCLR
Reset in software.
Words: 1
Cycles: 1
Q Cycle Activity:
Q1 Q2 Q3 Q4
Decode Start
reset
No
operation
No
operation
Example:
RESET
After Instruction
Registers = Reset Value
Flags* = Reset Value