Datasheet

 2010 Microchip Technology Inc. Preliminary DS39964B-page 349
PIC18F47J53 FAMILY
21.1 Baud Rate Generator (BRG)
The BRG is a dedicated, 8-bit or 16-bit generator that
supports both the Asynchronous and Synchronous
modes of the EUSART. By default, the BRG operates
in 8-bit mode; setting the BRG16 bit (BAUDCONx<3>)
selects 16-bit mode.
The SPBRGHx:SPBRGx register pair controls the period
of a free-running timer. In Asynchronous mode, the
BRGH (TXSTAx<2>) and BRG16 (BAUDCONx<3>) bits
also control the baud rate. In Synchronous mode, BRGH
is ignored.
Table 21-1 provides the formula for computation of the
baud rate for different EUSART modes, which only apply
in Master mode (internally generated clock).
Given the desired baud rate and F
OSC, the nearest
integer value for the SPBRGHx:SPBRGx registers can
be calculated using the formulas in Table 21-1. From
this, the error in baud rate can be determined. An
example calculation is provided in Example 21-1.
Typical baud rates and error values for the various
Asynchronous modes are provided in Table 21-2. It
may be advantageous to use the high baud rate
(BRGH = 1) or the 16-bit BRG to reduce the baud rate
error, or achieve a slow baud rate for a fast oscillator
frequency.
Writing a new value to the SPBRGHx:SPBRGx
registers causes the BRG timer to be reset (or cleared).
This ensures the BRG does not wait for a timer
overflow before outputting the new baud rate.
21.1.1 OPERATION IN POWER-MANAGED
MODES
The device clock is used to generate the desired baud
rate. When one of the power-managed modes is
entered, the new clock source may be operating at a
different frequency. This may require an adjustment to
the value in the SPBRGx register pair.
21.1.2 SAMPLING
The data on the RXx pin (either RC7/CCP10/PMA4/
RX1/DT1/SDO1/RP18 or RPn2/RX2/DT2) is sampled
three times by a majority detect circuit to determine if a
high or a low level is present at the RXx pin.
TABLE 21-1: BAUD RATE FORMULAS
Configuration Bits
BRG/EUSART Mode Baud Rate Formula
SYNC BRG16 BRGH
000 8-bit/Asynchronous F
OSC/[64 (n + 1)]
001 8-bit/Asynchronous
F
OSC/[16 (n + 1)]
010 16-bit/Asynchronous
011 16-bit/Asynchronous
F
OSC/[4 (n + 1)]10x 8-bit/Synchronous
11x 16-bit/Synchronous
Legend: x = Don’t care, n = value of SPBRGHx:SPBRGx register pair