Datasheet

 2010 Microchip Technology Inc. Preliminary DS39964B-page 337
PIC18F47J53 FAMILY
FIGURE 20-24: I
2
C™ MASTER MODE WAVEFORM (RECEPTION, 7-BIT ADDRESS)
P
9
87
6
5
D0
D1
D2
D3D4
D5
D6D7
S
A7 A6 A5 A4
A3 A2 A1
SDAx SCLx
12
3
4
5
6
7
8
9
12345678
9
1234
Bus master terminates
transfer
ACK
Receiving Data from Slave
Receiving Data from Slave
D0
D1
D2
D3D4
D5
D6D7
ACK
R/W = 0
Transmit Address to Slave
SSPxIF BF
ACK is not sent
Write to SSPxCON2<0> (SEN = 1),
Write to SSPxBUF occurs here,
ACK from Slave
Master configured as a receiver by programming SSPxCON2<3> (RCEN = 1)
PEN bit = 1 written here
Data shifted in on falling edge of CLK
Cleared in software
start XMIT
SEN = 0
SSPOV
SDAx = 0, SCLx = 1, while CPU
(SSPxSTAT<0>)
ACK
Cleared in software
Cleared in software
Set SSPxIF interrupt at end of receive
Set P bit (SSPxSTAT<4>) and SSPxIF
ACK from master,
Set SSPxIF at end
Set SSPxIF interrupt at end of Acknowledge sequence
Set SSPxIF interrupt at end of Acknowledge sequence
of receive
Set ACKEN, start Acknowledge sequence, SDAx = ACKDT = 1
RCEN cleared automatically
RCEN = 1, start next receive
Write to SSPxCON2<4> to start Acknowledge sequence, SDAx = ACKDT (SSPxCON2<5>) = 0
RCEN cleared automatically
responds to SSPxIF
ACKEN
begin Start condition
Cleared in software
SDAx = ACKDT = 0
Last bit is shifted into SSPxSR and contents are unloaded into SSPxBUF
Cleared in software
SSPOV is set because SSPxBUF is still full