Datasheet
2010 Microchip Technology Inc. Preliminary DS39964B-page 31
PIC18F47J53 FAMILY
2.0 GUIDELINES FOR GETTING
STARTED WITH PIC18FJ
MICROCONTROLLERS
2.1 Basic Connection Requirements
Getting started with the PIC18F47J53 family of 8-bit
microcontrollers requires attention to a minimal set of
device pin connections before proceeding with
development.
The following pins must always be connected:
•All V
DD and VSS pins
(see Section 2.2 “Power Supply Pins”)
•All AV
DD and AVSS pins, regardless of whether or
not the analog device features are used
(see Section 2.2 “Power Supply Pins”)
•M
CLR pin
(see Section 2.3 “Master Clear (MCLR) Pin”)
•V
CAP/VDDCORE pins (see Section 2.4 “Voltage
Regulator Pins (V
CAP/VDDCORE)”)
These pins must also be connected if they are being
used in the end application:
• PGC/PGD pins used for In-Circuit Serial
Programming™ (ICSP™) and debugging purposes
(see Section 2.5 “ICSP Pins”)
• OSCI and OSCO pins when an external oscillator
source is used
(see Section 2.6 “External Oscillator Pins”)
Additionally, the following pins may be required:
•V
REF+/VREF- pins are used when external voltage
reference for analog modules is implemented
The minimum mandatory connections are shown in
Figure 2-1.
FIGURE 2-1: RECOMMENDED
MINIMUM CONNECTIONS
Note: On 44-pin QFN packages, the AVDD and
AV
SS pins must always be connected,
regardless of whether any of the analog
modules are being used. On other pack-
age types, the AV
DD and AVSS pins are
internally connected to the V
DD/VSS pins.
PIC18FXXJXX
VDD
VSS
VDD
VSS
VSS
VDD
AVDD
AVSS
VDD
VSS
C1
R1
V
DD
MCLR
VCAP/VDDCORE
R2
C7
C2
(2)
C3
(2)
C4
(2)
C5
(2)
C6
(2)
Key (all values are recommendations):
C1 through C6: 0.1 F, 20V ceramic
C7: 10 F, 6.3V or greater, tantalum or ceramic
R1: 10 kΩ
R2: 100Ω to 470Ω
Note 1: See Section 2.4 “Voltage Regulator Pins
(V
CAP/VDDCORE)” for explanation of
V
CAP/VDDCORE connections.
2: The example shown is for a PIC18F device
with five V
DD/VSS and AVDD/AVSS pairs.
Other devices may have more or less pairs;
adjust the number of decoupling capacitors
appropriately.
(1)