Datasheet

 2010 Microchip Technology Inc. Preliminary DS39964B-page 151
PIC18F47J53 FAMILY
TABLE 10-6: SUMMARY OF REGISTERS ASSOCIATED WITH PORTB
RB7/CCP7/
KBI3/PGD/
RP10
RB7 0 O DIG LATB<7> data output.
1 I TTL PORTB<7> data input; weak pull-up when the RBPU
bit is
cleared.
CCP7
1
I ST Capture input.
0 O DIG Compare/PWM output.
KBI3 1 O TTL Interrupt-on-change pin.
PGD x O DIG Serial execution data output for ICSP and ICD operation.
(2)
x I ST Serial execution data input for ICSP and ICD operation.
(2)
RP10 1 I ST Remappable Peripheral Pin 10 input.
0 O DIG Remappable Peripheral Pin 10 output.
TABLE 10-5: PORTB I/O SUMMARY (CONTINUED)
Pin Function
TRIS
Setting
I/O
I/O
Type
Description
Legend: DIG = Digital level output; TTL = TTL input buffer; ST = Schmitt Trigger input buffer; ANA = Analog level
input/output; x = Don’t care (TRIS bit does not affect port direction or is overridden for this option)
Note 1: Pins are configured as analog inputs by default on POR. Using these pins for digital inputs requires setting
the appropriate bits in the ANCON1 register.
2: All other pin functions are disabled when ICSP™ or ICD is enabled.
3: Available only on 44-pin devices (PIC18F46J53, PIC18F47J53, PIC18LF46J53 and PIC18LF47J53).
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
PORTB RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0
LATB LATB7 LATB6 LATB5 LATB4 LATB3 LATB2 LATB1 LATB0
TRISB TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF
INTCON2 RBPU
INTEDG0 INTEDG1 INTEDG2 INTEDG3 TMR0IP INT3IP RBIP
INTCON3 INT2IP INT1IP INT3IE INT2IE INT1IE INT3IF INT2IF INT1IF
ANCON1
VBGEN — —PCFG12PCFG11 PCFG10 PCFG9 PCFG8
REFOCON ROON — ROSSLP ROSEL RODIV3 RODIV2 RODIV1 RODIV0
CM3CON CON COE CPOL EVPOL1 EVPOL0 CREF CCH1 CCH0
PADCFG1
— — — — — RTSECSEL1 RTSECSEL0 PMPTTL
RTCCFG RTCEN — RTCWREN RTCSYNC HALFSEC RTCOE RTCPTR1 RTCPTR0
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PORTB.