Datasheet

Table Of Contents
PIC16F87X
DS30292D-page 36 1998-2013 Microchip Technology Inc.
3.5 PORTE and TRISE Register
PORTE and TRISE are not implemented on the
PIC16F873 or PIC16F876.
PORTE has three pins (RE0/RD
/AN5, RE1/WR/AN6,
and RE2/CS
/AN7) which are individually configureable
as inputs or outputs. These pins have Schmitt Trigger
input buffers.
The PORTE pins become the I/O control inputs for the
microprocessor port when bit PSPMODE (TRISE<4>) is
set. In this mode, the user must make certain that the
TRISE<2:0> bits are set, and that the pins are configured
as digital inputs. Also ensure that ADCON1 is configured
for digital I/O. In this mode, the input buffers are TTL.
Register 3-1 shows the TRISE register, which also con-
trols the parallel slave port operation.
PORTE pins are multiplexed with analog inputs. When
selected for analog input, these pins will read as '0's.
TRISE controls the direction of the RE pins, even when
they are being used as analog inputs. The user must
make sure to keep the pins configured as inputs when
using them as analog inputs.
FIGURE 3-8: PORTE BLOCK DIAGRAM
(IN I/O PORT MODE)
TABLE 3-9: PORTE FUNCTIONS
TABLE 3-10: SUMMARY OF REGISTERS ASSOCIATED WITH PORTE
Note: On a Power-on Reset, these pins are con-
figured as analog inputs, and read as ‘0’.
Data
Bus
WR
Port
WR
TRIS
RD Port
Data Latch
TRIS Latch
RD
Schmitt
Trigger
Input
Buffer
QD
CK
QD
CK
EN
QD
EN
I/O pin
(1)
Note 1: I/O pins have protection diodes to VDD and VSS.
TRIS
Name Bit# Buffer Type Function
RE0/RD
/AN5 bit0 ST/TTL
(1)
I/O port pin or read control input in Parallel Slave Port mode or analog input:
RD
1 =Idle
0 = Read operation. Contents of PORTD register are output to PORTD
I/O pins (if chip selected)
RE1/WR/AN6 bit1 ST/TTL
(1)
I/O port pin or write control input in Parallel Slave Port mode or analog input:
WR
1 =Idle
0 = Write operation. Value of PORTD I/O pins is latched into PORTD
register (if chip selected)
RE2/CS
/AN7 bit2 ST/TTL
(1)
I/O port pin or chip select control input in Parallel Slave Port mode or analog input:
CS
1 = Device is not selected
0 = Device is selected
Legend: ST = Schmitt Trigger input, TTL = TTL input
Note 1: Input buffers are Schmitt Triggers when in I/O mode and TTL buffers when in Parallel Slave Port mode.
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on:
POR, BOR
Value on
all other
RESETS
09h PORTE
RE2 RE1 RE0 ---- -xxx ---- -uuu
89h TRISE
IBF OBF IBOV PSPMODE PORTE Data Direction Bits 0000 -111 0000 -111
9Fh ADCON1
ADFM PCFG3 PCFG2 PCFG1 PCFG0 --0- 0000 --0- 0000
Legend: x = unknown, u = unchanged, - = unimplemented, read as '0'. Shaded cells are not used by PORTE.