Datasheet

 2011 Microchip Technology Inc. Preliminary DS41576B-page 99
PIC12F752/HV752
TABLE 11-1: SUMMARY OF REGISTERS ASSOCIATED WITH COG
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
ANSELA
— — ANSA5 ANSA4 — ANSA2 ANSA1 ANSA0 50
APFCON
— — —
T1GSEL — COG1FSEL COG1O1SEL COG1O0SEL 46
COG1PH
— — — —
G1PH<3:0> 98
COG1BLK G1BLKR<3:0> G1BLKF<3:0> 98
COG1DB G1DBR<3:0> G1DBF<3:0> 98
COG1CON0 G1EN G1OE1 G1OE0 G1POL1 G1POL0 G1LD G1CS1 G1CS0 95
COG1CON1 G1FSIM G1RSIM G1FS<2:0> G1RS<2:0> 96
COG1ASD G1ASDE G1ARSEN G1ASDL1 G1ASDL0 G1ASDSHLT G1ASDSC2 G1ASDSC1 G1ASDSFLT 97
INTCON GIE PEIE
T0IE INTE IOCIE T0IF INTF IOCIF 20
LATA
— —LATA5LATA4 —LATA2LATA1 LATA0 48
PIE2
— — C2IE C1IE —COG1IE— CCP1IE 22
PIR2
— — C2IF C1IF —COG1IF— CCP1IF 24
TRISA
— — TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 48
Legend: x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by COG.
Note 1: Other (non Power-up) Resets include MCLR
Reset and Watchdog Timer Reset during normal operation.
2: See Configuration Word register (Register 17-1) for operation of all register bits.