Datasheet

 2011 Microchip Technology Inc. Preliminary DS41576B-page 141
PIC12F752/HV752
17.0 SPECIAL FEATURES OF THE
CPU
The PIC12F752/HV752 has a host of features intended
to maximize system reliability, minimize cost through
elimination of external components, provide power-
saving features and offer code protection.
These features are:
• Reset
- Power-on Reset (POR)
- Power-up Timer (PWRT)
- Brown-out Reset (BOR)
• Interrupts
• Watchdog Timer (WDT)
• Oscillator selection
• Sleep
• Code protection
• ID Locations
• In-Circuit Serial Programming
The Power-up Timer (PWRT), which provides a fixed
delay of 64 ms (nominal) on power-up only, is designed
to keep the part in Reset while the power supply
stabilizes. There is also circuitry to reset the device if a
brown-out occurs, which can use the Power-up Timer
to provide at least a 64 ms Reset. With these functions-
on-chip, most applications need no external Reset
circuitry.
The Sleep mode is designed to offer a very low-current
Power-Down mode. The user can wake-up from Sleep
through:
• External Reset
• Watchdog Timer Wake-up
• An interrupt
Oscillator selection options are available to allow the
part to fit the application. The INTOSC options save
system cost, while the External Clock (EC) option
provides a means for specific frequency and accurate
clock sources. Configuration bits are used to select
various options (see Register 17-1).
17.1 Configuration Bits
The Configuration bits can be programmed (read as
‘0’), or left unprogrammed (read as ‘1’) to select various
device configurations as shown in Register 17-1.
These bits are mapped in program memory location
2007h.
Note: Address 2007h is beyond the user program
memory space. It belongs to the special
configuration memory space (2000h-
3FFFh), which can be accessed only during
programming. See Memory Programming
Specification (DS41561) for more
information.