Datasheet

 2010-2012 Microchip Technology Inc. DS41414D-page 103
PIC16(L)F1946/47
8.0 LOW DROPOUT (LDO)
VOLTAGE REGULATOR
The PIC16F1946/47 has an internal Low Dropout
Regulator (LDO) which provides operation above 3.6V.
The LDO regulates a voltage for the internal device
logic while permitting the V
DD and I/O pins to operate
at a higher voltage. There is no user enable/disable
control available for the LDO, it is always active. The
PIC16LF1946/47 operates at a maximum V
DD of 3.6V
and does not incorporate an LDO.
A device I/O pin may be configured as the LDO voltage
output, identified as the V
CAP pin. Although not
required, an external low-ESR capacitor may be con-
nected to the VCAP pin for additional regulator stability.
The VCAPEN bit of Configuration Words enables or dis-
ables the V
CAP pin. Refer to Ta ble 8 -1.
On power-up, the external capacitor will load the LDO
voltage regulator. To prevent erroneous operation, the
device is held in Reset while a constant current source
charges the external capacitor. After the cap is fully
charged, the device is released from Reset. For more
information on the constant current rate, refer to the
LDO Regulator Characteristics Table in Section 30.0
“Electrical Specifications”.
TABLE 8-2: SUMMARY OF CONFIGURATION WORD WITH LDO
TABLE 8-1: VCAPEN SELECT BIT
VCAPEN Pin
0 RF0
1 No Vcap
Name Bits Bit -/7 Bit -/6 Bit 13/5 Bit 12/4 Bit 11/3 Bit 10/2 Bit 9/1 Bit 8/0
Register
on Page
CONFIG2
13:8
— — LVP DEBUG — BORV STVREN PLLEN
58
7:0
— — —VCAPEN— — WRT1 WRT0
Legend: — = unimplemented locations read as ‘0’. Shaded cells are not used by LDO.