Manual

Evaluates: MAX5863/MAX5864/MAX5865
MAX5865 Evaluation Kit
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Receive Dual ADC Analog Inputs
The MAX5865 integrates a dual 8-bit ADC that accepts
differential or single-ended analog input signals. The
inputs are simultaneously sampled on the rising edge
of the clock. The EV kit is designed to accept differen-
tial or single-ended, AC- or DC-coupled input signals
with full-scale amplitude of less than 1.024V
P-P
(+4dBm). Ensure that the ADC input is not overdriven
by observing the output digital codes and adjusting the
input signal level for code of -0.5dB full scale. See
Table 4 for instructions to configure jumpers JU1, JU2,
JU3, JU4, JU9, and JU10 for the desired analog input.
During single-ended operation the signal is applied
directly to the ADC input. While in differential mode, an
on-board transformer uses the single-ended analog
input to generate a differential analog signal that is
applied at the ADC’s differential input pins.
The EV kit does not include analog input filters for the
ADC channels. Note that function generators exhibit
high harmonic distortions that could degrade the true
performance of the ADC. Select appropriate filters per
specific applications, test tones, and improve the signal
integrity of the function generators.
Note: When a differential signal is applied to the ADC,
the positive and negative input pins of the ADC each
receive half of the input signal supplied at SMA con-
nectors IA and QA with an offset voltage of VDD/2.
Receive Dual 8-Bit ADC Output
The 8-bit digital output data for the IA and QA channels
are multiplexed at output data bus DA0–DA7. The IA
channel data is available on the falling edge of the clock.
The QA channel data is available on the rising edge of
the clock. The MAX5865 EV kit provides a 0.1in 2 x 10
header (J1) to interface with a logic-analyzer or data-
acquisition system. The header data pins are labeled on
the board with the appropriate data bit designations. Use
the labels on the EV kit to match the output data bits to
the data-acquisition system. Header pins J1-4 through
J1-18 (even pins) are data pins DA0–DA7. Header pin
J1-2 is a clock signal pin. All other header pins are con-
nected to digital ground OGND.
Reference Voltage Options
The MAX5865 provides two reference modes of opera-
tion that can be selected by applying a voltage input to
the REFIN pin. The reference voltage sets the full-scale
input voltage of the ADC and the full-scale output volt-
age of the DAC. The MAX5865 EV kit provides jumper
JU11 and the REFIN PC board pad that allows access
to the input pin and selects one of the two reference
modes: internal reference mode or buffered external
reference mode. See Table 5 for instructions to select
the voltage reference mode. Using an external refer-
ence enhances accuracy and drift performance or can
be used for gain control.
JUMPER
SHUNT
POSITION
PIN CONNECTION EV KIT OPERATION
JU1 2 and 3
IA+ pin AC-coupled to SMA connector IAP
through R1 and C28.
JU2 2 and 3 IA- pin connected to COM pin through R2.
JU9 Installed
IA+ pin assumes the DC offset at REFP and
REFN.
Single-ended input, AC-coupled. Analog
input signal is applied to the IAP SMA
connector, channel IA:
• R26 opened (default).
JU1 2 and 3
IA+ pin DC-coupled to SMA connector IAP
through R1 and R26.
JU2 2 and 3 IA- pin connected to COM pin through R2.
JU9 Not installed
IA+ pin assumes the DC offset from the
analog input source.
Single-ended input, DC-coupled. Analog
input signal is applied to the IAP SMA
connector, channel IA:
• R26 shorted (0Ω)
• C28 opened (removed)
• R29 opened (removed)
JU1 1 and 2
IA+ pin connected to pin 6 of transformer T1
through R1.
JU2 1 and 2
IA- pin connected to pin 4 of transformer T1
through R2.
Differential input, AC-coupled. Single-
ended analog input signal is applied to IA
SMA connector, channel IA.
Table 4. Single-Ended/Differential/AC-Coupled/DC-Coupled Jumper Configuration