Datasheet

 
 
SLUS542F − OCTOBER 2003 − REVISED JULY 2009
17
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FUNCTIONAL DESCRIPTION
Synchronization
The UCC2891 family has a synchronization input pin which can be used to synchronize their oscillator to a
constant frequency system clock. The synchronization signal must have a higher frequency than the free
running oscillator frequency and can be either in-phase or out-of-phase for interleaved operation.
The operation of the oscillator and relevant other waveforms in free running and synchronized mode are shown
in Figure 6.
C
T
SYNC
D
MAX
OUT
AUX
UDG−03152
Figure 6. Synchronization Waveforms, P−Channel
The most critical and unique feature of the oscillator is to limit the maximum operating duty cycle of the converter.
It is achieved by accurately controlling the charge and discharge intervals of the on board timing capacitor. The
maximum on-time of OUT (pin 13), which is also the maximum duty cycle of the active clamp converter is limited
by the charging interval of the timing capacitor. While the capacitor is being reset to its initial voltage level OUT
is guaranteed to be off.
When synchronization is used, the rising edge of the signal terminates the charging period and initiate the
discharge of the timing capacitor. Once the timing capacitor voltage reaches the predefined valley voltage, a
new charge period starts automatically. This method of synchronization leaves the charge and discharge slopes
of the timing waveform unaffected thus maintains the maximum duty cycle of the converter, independent of the
mode of operation.
Although the synchronization circuit is level sensitive, the actual synchronization event occurs at the rising edge
of the waveform. This allows the synchronizing pulse width to vary significantly but certain limitations must be
observed. The minimum pulse width should be sufficient to guarantee reliable triggering of the internal oscillator
circuitry, therefore it should be greater than approximately 50 nanoseconds. The other limiting factor is to keep
it shorter than
ǒ
1 * D
MAX
Ǔ
T
SYNC
where T
SYNC
is the period of the synchronization frequency.