Datasheet

TMS320F28030, TMS320F28031, TMS320F28032
TMS320F28033, TMS320F28034, TMS320F28035
www.ti.com SPRS584J –APRIL 2009–REVISED OCTOBER 2013
6.13 Flash Timing
Table 6-41. Flash/OTP Endurance for T Temperature Material
(1)
ERASE/PROGRAM
MIN TYP MAX UNIT
TEMPERATURE
N
f
Flash endurance for the array (write/erase cycles) 0°C to 105°C (ambient) 20000 50000 cycles
N
OTP
OTP endurance for the array (write cycles) 0°C to 30°C (ambient) 1 write
(1) Write/erase operations outside of the temperature ranges indicated are not specified and may affect the endurance numbers.
Table 6-42. Flash/OTP Endurance for S Temperature Material
(1)
ERASE/PROGRAM
MIN TYP MAX UNIT
TEMPERATURE
N
f
Flash endurance for the array (write/erase cycles) 0°C to 125°C (ambient) 20000 50000 cycles
N
OTP
OTP endurance for the array (write cycles) 0°C to 30°C (ambient) 1 write
(1) Write/erase operations outside of the temperature ranges indicated are not specified and may affect the endurance numbers.
Table 6-43. Flash/OTP Endurance for Q Temperature Material
(1)
ERASE/PROGRAM
MIN TYP MAX UNIT
TEMPERATURE
N
f
Flash endurance for the array (write/erase cycles) –40°C to 125°C (ambient) 20000 50000 cycles
N
OTP
OTP endurance for the array (write cycles) –40°C to 30°C (ambient) 1 write
(1) Write/erase operations outside of the temperature ranges indicated are not specified and may affect the endurance numbers.
Table 6-44. Flash Parameters at 60-MHz SYSCLKOUT
TEST
PARAMETER MIN TYP MAX UNIT
CONDITIONS
Program Time 16-Bit Word 50 μs
8K Sector 250 ms
4K Sector 125 ms
Erase Time
(1)
8K Sector 2 s
4K Sector 2 s
I
DDP
(2)
V
DD
current consumption during Erase/Program cycle VREG 80 mA
disabled
I
DDIOP
(2)
V
DDIO
current consumption during Erase/Program cycle 60
I
DDIOP
(2)
V
DDIO
current consumption during Erase/Program cycle VREG enabled 120 mA
(1) The on-chip flash memory is in an erased state when the device is shipped from TI. As such, erasing the flash memory is not required
prior to programming, when programming the device for the first time. However, the erase operation is needed on all subsequent
programming operations.
(2) Typical parameters as seen at room temperature including function call overhead, with all peripherals off. It is important to maintain a
stable power supply during the entire flash programming process. It is conceivable that device current consumption during flash
programming could be higher than normal operating conditions. The power supply used should ensure V
MIN
on the supply rails at all
times, as specified in the Recommended Operating Conditions of the data sheet. Any brown-out or interruption to power during
erasing/programming could potentially corrupt the password locations and lock the device permanently. Powering a target board (during
flash programming) through the USB port is not recommended, as the port may be unable to respond to the power demands placed
during the programming process.
Table 6-45. Flash/OTP Access Timing
PARAMETER MIN MAX UNIT
t
a(fp)
Paged Flash access time 40 ns
t
a(fr)
Random Flash access time 40 ns
t
a(OTP)
OTP access time 60 ns
Copyright © 2009–2013, Texas Instruments Incorporated Electrical Specifications 145
Submit Documentation Feedback
Product Folder Links: TMS320F28030 TMS320F28031 TMS320F28032 TMS320F28033 TMS320F28034
TMS320F28035