Datasheet

   
     
  
SLOS289E − DECEMBER 1999 − REVISED SEPTEMBER 2006
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
shutdown function
Two members of the TLV411x family (TLV4110/3) have a shutdown terminal for conserving battery life in
portable applications. When the shutdown terminal is tied low, the supply current is reduced to just nano amps
per channel, the amplifier is disabled, and the outputs are placed in a high impedance mode. In order to save
power in shutdown mode, an external pullup resistor is required, therefore, to enable the amplifier the shutdown
terminal must be pulled high. When the shutdown terminal is left floating, care should be taken to ensure that
parasitic leakage current at the shutdown terminal does not inadvertently place the operational amplifier into
shutdown.
driving a capacitive load
When the amplifier is configured in this manner, capacitive loading directly on the output will decrease the
device’s phase margin leading to high frequency ringing or oscillations. Therefore, for capacitive loads of greater
than 1 nF, it is recommended that a resistor be placed in series (R
NULL
) with the output of the amplifier, as shown
in Figure 27. A maximum value of 20 Ω should work well for most applications.
C
LOAD
R
F
Input
Output
R
G
R
NULL
+
−
R
L
C
L
R
F
Input
Outpu
t
R
G
R
NULL
+
−
R
L
Snubber
C
(a) (b)
Figure 27. Driving a Capacitive Load
offset voltage
The output offset voltage, (V
OO
) is the sum of the input offset voltage (V
IO
) and both input bias currents (I
IB
) times
the corresponding gains. The following schematic and formula can be used to calculate the output offset
voltage:
V
OO
+ V
IO
ǒ
1 ) ǒ
R
F
R
G
Ǔ
Ǔ
" I
IB)
R
S
ǒ
1 ) ǒ
R
F
R
G
Ǔ
Ǔ
" I
IB–
R
F
+
−
V
I
+
R
G
R
S
R
F
I
IB−
V
O
I
IB+
Figure 28. Output Offset Voltage Model