Datasheet
SLOS186C − FEBRUARY 1997 − REVISED AUGUST 2006
40
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
driving large capacitive loads (continued)
∆θ
m2
+ tan
–1
ȧ
ȱ
Ȳ
UGBW
ǒ
F×P
2
Ǔ
ȧ
ȳ
ȴ
– tan
–1
ǒ
UGBW
P
2
Ǔ
∆θ
m2
+ reduction in phase margin
UGBW + unity-gain bandwidth frequency
F + factor from equation (2)
P
2
+ unadjusted pole (70 MHz @ 10 pF, 7 MHz @100 pF, etc.)
(3)
Where :
Using these equations with Figure 60 and Figure 61 enables the designer to choose the appropriate output
series resistance to optimize the design of circuits driving large capacitive loads.
50 kΩ
50 kΩ
V
DD−
/GND
V
DD+
R
null
C
L
V
I
+
−
Figure 61. Series-Resistance Circuit