Datasheet

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DMOS

500mA Low-Dropout Regulator

FEATURES

● NEW DMOS TOPOLOGY:

Ultra Low Dropout Voltage:

115mV Typ at 500mA and 3.3V Output

Output Capacitor NOT Required for Stability

● FAST TRANSIENT RESPONSE

●

VERY LOW NOISE:

Vrms

● HIGH ACCURACY: ±2% max

● HIGH EFFICIENCY:

GND

= 1mA at I

OUT

= 500mA

Not Enabled: I

GND

= 0.5µA

● 2.5V, 2.7V, 3.0V, 3.3V, 5.0V, AND ADJUSTABLE

OUTPUT VERSIONS

● FOLDBACK CURRENT LIMIT

● THERMAL PROTECTION

● OUTPUT VOLTAGE ERROR INDICATOR

(1)

● SMALL SURFACE-MOUNT PACKAGES:

SOT223-5, DDPAK-5, SO-8

APPLICATIONS

● PORTABLE COMMUNICATION DEVICES

● BATTERY-POWERED EQUIPMENT

● PERSONAL DIGITAL ASSISTANTS

● MODEMS

● BAR-CODE SCANNERS

● BACKUP POWER SUPPLIES

DESCRIPTION

The REG103 is a family of low-noise, low-dropout, linear

regulators with low ground pin current. Its new DMOS

topology provides significant improvement over previous

designs, including low-dropout voltage (only 115mV typ at

full load), and better transient performance. In addition, no

output capacitor is required for stability, unlike conventional

low-dropout regulators that are difficult to compensate and

require expensive low ESR capacitors greater than 1µF.

Typical ground pin current is only 1mA (at I

OUT

= 500mA)

and drops to 0.5µA in not enabled mode. Unlike regulators

with PNP pass devices, quiescent current remains relatively

constant over load variations and under dropout conditions.

The REG103 has very low output noise (typically 33µVrms

for V

OUT

= 3.3V with C

= 0.01µF), making it ideal for use

in portable communications equipment. On-chip trimming

results in high output voltage accuracy. Accuracy is main-

tained over temperature, line, and load variations. Key

parameters are tested over the specified temperature range

(–40°C to +85°C).

The SO-8 version of the REG103 has an ERROR pin that

provides a power good flag, indicating the regulator is in

regulation. The REG103 is well protected—internal cir-

cuitry provides a current limit that protects the load from

damage. Thermal protection circuitry keeps the chip from

being damaged by excessive temperature. In addition to the

SO-8 package, the REG103 is also available in the DDPAK

and the SOT223-5.

REG103

(Fixed Voltage

Versions)

ENABLE

Gnd

0.1µF

OUT

(2)

OUT

NR = Noise Reduction

ERROR

(1)

ERROR

REG103-A

Gnd

ENABLE

0.1µF

OUT

(2)

OUT

Adj

REG103

SBVS010D – JANUARY 2000 – REVISED SEPTEMBER 2005

www.ti.com

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

All trademarks are the property of their respective owners.

NOTE: (1) SO-8 Package Only. (2) Optional.

Summary of content (27 pages)

PAGE 1
R EG 103 REG REG103 103 REG 103 SBVS010D – JANUARY 2000 – REVISED SEPTEMBER 2005 DMOS 500mA Low-Dropout Regulator FEATURES DESCRIPTION ● NEW DMOS TOPOLOGY: Ultra Low Dropout Voltage: 115mV Typ at 500mA and 3.3V Output Output Capacitor NOT Required for Stability ● FAST TRANSIENT RESPONSE ● VERY LOW NOISE: 33µVrms ● HIGH ACCURACY: ±2% max ● HIGH EFFICIENCY: IGND = 1mA at IOUT = 500mA Not Enabled: IGND = 0.5µA ● 2.5V, 2.7V, 3.0V, 3.3V, 5.
PAGE 2
ABSOLUTE MAXIMUM RATINGS(1) Supply Input Voltage, VIN ....................................................... –0.3V to 16V Enable Input Voltage, VEN ....................................................... –0.3V to VIN Feedback Voltage, VFB ........................................................ –0.3V to 6.0V NR Pin Voltage, VNR ............................................................. –0.3V to 6.0V Error Flag Output ..................................................................... –0.
PAGE 3
ELECTRICAL CHARACTERISTICS Boldface limits apply over the specified temperature range, TJ = –40°C to +85°C. At TJ = +25°C, VIN = VOUT + 1V (VOUT = 3.0V for REG103-A), VENABLE = 2V, IOUT = 10mA, CNR = 0.01µF, and COUT = 0.1µF(1), unless otherwise noted. REG103GA, UA, FA PARAMETER OUTPUT VOLTAGE Output Voltage Range REG103-2.5 REG103-2.7 REG103-3.0 REG103-3.
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TYPICAL CHARACTERISTICS For all models, at TJ = +25°C and VENABLE = 2V, unless otherwise noted. OUTPUT VOLTAGE CHANGE vs IOUT (VIN = VOUT + 1V, Output Voltage % Change Referred to IOUT = 10mA at +25°C) DC DROPOUT VOLTAGE vs OUTPUT CURRENT 180 0.5 DC Dropout Voltage (mV) Output Voltage Change (%) 160 0 –0.5 –1.
PAGE 5
TYPICAL CHARACTERISTICS (Cont.) For all models, at TJ = +25°C and VENABLE = 2V, unless otherwise noted. COUT = 0 VOUT 50mV/div 200mV/div 200mV/div REG103-3.3 VIN = 4.3V LINE TRANSIENT RESPONSE COUT = 10µF VOUT 50mV/div LOAD TRANSIENT RESPONSE COUT = 0 COUT = 10µF 500mA IOUT VOUT VOUT 6V 10mA VIN 5V 10µs/div 50µs/div VOUT 50mV/div LINE TRANSIENT RESPONSE VOUT 50mV/div REG103-Adj. VOUT = 3.3V, VIN = 4.3V, CFB = 0.
PAGE 6
TYPICAL CHARACTERISTICS (Cont.) For all models, at TJ = +25°C and VENABLE = 2V, unless otherwise noted. GROUND PIN CURRENT, NOT ENABLED vs TEMPERATURE GROUND PIN CURRENT vs TEMPERATURE 3 1.2 VENABLE = 0V 1.1 2.5 2 = 10mA = 100mA = 500mA 0.9 0.8 IGND (µA) IGND (mA) 1 0.7 1.5 1 0.6 0.5 0.5 0.4 –75 –50 –25 0 25 50 75 100 0 –75 125 –50 –25 0 GROUND PIN CURRENT vs IOUT 50 75 100 125 IADJUST vs TEMPERATURE 1.2 0.28 1.1 0.
PAGE 7
TYPICAL CHARACTERISTICS (Cont.) For all models, at TJ = +25°C and VENABLE = 2V, unless otherwise noted. RIPPLE REJECTION vs IOUT SOFT START 75 VRIPPLE = 3Vp-p, f = 120Hz No Load 1V/div Ripple Rejection (dB) 70 65 VOUT RLOAD = 6.8Ω 60 55 50 45 VENABLE 2V 0 40 0 100 200 300 400 500 250µs/div Load Current (mA) OUTPUT VOLTAGE DRIFT HISTOGRAM OUTPUT DISABLE TIME 45 40 RLOAD = 330 35 VOUT Percent of Units (%) 1V/div No Load RLOAD = 6.
PAGE 8
BASIC OPERATION The REG103 series is a family of LDO (Low Drop-Out) linear regulators. The family includes five fixed output versions (2.5V to 5.0V) and an adjustable output version. An internal DMOS power device provides low dropout regulation with near constant ground pin current (largely independent of load and drop-out conditions) and very fast line and load transient response. All versions include internal current limit and thermal shutdown circuitry.
PAGE 9
3.5 100 2.5 10 Enable Current (µA) Output Voltage (V) 3 2 1.5 1 0.5 1 0.1 0.01 0 0 100 200 300 400 500 600 700 800 Output Current (mA) 0.001 0 2 4 6 (a) Foldback Current Limit of the REG103-3.3 at 25°C. 8 10 12 14 16 Enable Voltage RBOOST FIGURE 5. ENABLE Pin Current versus Applied Voltage. VIN VOUT REG103 + + 0.1µF 0.1µF(1) Load Gnd (1) Optional. (b) Foldback Current Boost Circuit. FIGURE 3. Foldback Current Limit and Boost Circuit.
PAGE 10
Since the value of VREF is 1.295V, this relationship reduces to: 10.0 µVrms • VOUT V Connecting a capacitor, CNR, from the Noise-Reduction (NR) pin to ground, can reduce the output noise voltage. Adding CNR, as shown in Figure 7, forms a low-pass filter for the voltage reference. For CNR = 10nF, the total noise in the 10Hz to 100kHz bandwidth is reduced by approximately a factor of 3.5, as shown in Figure 8. nV/√Hz VN = 35 1.0 COUT = 0, CFB = 0 COUT = 0, CFB = 0.01µF COUT = 10µF, CFB = 0.01µF 0.
PAGE 11
For large step changes in load current, the REG103 requires a larger voltage drop across it to avoid degraded transient response. The boundary of this “transient drop-out” region is shown as the top line in Figure 10. Values of VIN to VOUT voltage drop above this line insure normal transient response. REG103–3.3 at 25°C 250 200 150 100 50 0 0 100 200 300 400 500 IOUT (mA) FIGURE 10. Transient and DC Dropout.
PAGE 12
Power dissipation depends on input voltage and load conditions. Power dissipation is equal to the product of the average output current times the voltage across the output element, VIN to VOUT voltage drop. PD = (VIN – VOUT ) • I OUT ( AVG ) Power dissipation can be minimized by using the lowest possible input voltage necessary to assure the required output voltage. REGULATOR MOUNTING The tab of both packages is electrically connected to ground.
PAGE 13
PACKAGE OPTION ADDENDUM www.ti.com 31-Oct-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) TBD Call TI Call TI Op Temp (°C) Device Marking (4/5) REG103FA-2.5 OBSOLETE DDPAK/ TO-263 KTT 5 REG103FA-2.5/500 NRND DDPAK/ TO-263 KTT 5 500 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR REG 103FA-2.5 REG103FA-2.
PAGE 14
PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 31-Oct-2013 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.
PAGE 18
PACKAGE MATERIALS INFORMATION www.ti.com 9-Sep-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant REG103FA-2.5/500 DDPAK/ TO-263 KTT 5 500 330.0 24.4 10.6 15.6 4.9 16.0 24.0 Q2 REG103FA-2.5KTTT DDPAK/ TO-263 KTT 5 50 330.0 24.4 10.6 15.6 4.9 16.0 24.0 Q2 REG103FA-3.3/500 DDPAK/ TO-263 KTT 5 500 330.0 24.4 10.6 15.6 4.
PAGE 19
PACKAGE MATERIALS INFORMATION www.ti.com 9-Sep-2013 Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant REG103UA-3.3/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 REG103UA-5/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 REG103UA-A/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.
PAGE 20
PACKAGE MATERIALS INFORMATION www.ti.com 9-Sep-2013 Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) REG103UA-A/2K5 SOIC D 8 2500 367.0 367.0 35.
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