Datasheet

V
CC
V
SS
I
CCV
O
VI
0 V
CC
VI
V
CC
I
CC
CAPD.x = 1
+ Terminal
− Terminal
Comparator Inputs
Comparator Output
Unfiltered at CAOUT
Comparator Output
Filtered at CAOUT
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Comparator_A+ Operation
Figure 21-3. RC-Filter Response at the Output of the Comparator
21.2.5 Voltage Reference Generator
The voltage reference generator is used to generate V
CAREF
,which can be applied to either comparator
input terminal. The CAREFx bits control the output of the voltage generator. The CARSEL bit selects the
comparator terminal to which V
CAREF
is applied. If external signals are applied to both comparator input
terminals, the internal reference generator should be turned off to reduce current consumption. The
voltage reference generator can generate a fraction of the device’s V
CC
or a fixed transistor threshold
voltage of ~0.55 V.
21.2.6 Comparator_A+, Port Disable Register CAPD
The comparator input and output functions are multiplexed with the associated I/O port pins, which are
digital CMOS gates. When analog signals are applied to digital CMOS gates, parasitic current can flow
from VCC to GND. This parasitic current occurs if the input voltage is near the transition level of the gate.
Disabling the port pin buffer eliminates the parasitic current flow and therefore reduces overall current
consumption.
The CAPDx bits, when set, disable the corresponding pin input and output buffers as shown in Figure 21-
4. When current consumption is critical, any port pin connected to analog signals should be disabled with
its CAPDx bit.
Selecting an input pin to the comparator multiplexer with the P2CAx bits automatically disables the input
and output buffers for that pin, regardless of the state of the associated CAPDx bit.
Figure 21-4. Transfer Characteristic and Power Dissipation in a CMOS Inverter/Buffer
NOTE: MSP430G2210:The channels 0, 1, 3, an 4 are implemented by not available at pins. To
avoid floating inputs these inputs should not be used.
527
SLAU144JDecember 2004Revised July 2013 Comparator_A+
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