Datasheet

Modulator
ACLK
SMCLK
SMCLK
00
01
10
11
UCSSELx
UC0CLK
Prescaler/Divider
Receive Baudrate Generator
UC0BRx
16
UCBRFx
4
UCBRSx
3
UCOS16
UCRXERR
Error Flags
Set Flags
UCPE
UCFE
UCOE
UCABEN
Receive Shift Register
Receive Buffer UC 0RXBUF
Receive State Machine
1
0
UCIREN
UCPEN UCPAR UCMSB UC7BIT
UCDORMUCMODEx
2
UCSPB
Set UCBRK
Set UCADDR/UCIDLE
0
1
UCLISTEN
UC0RX
1
0
UCIRRXPL
IrDA Decoder
UCIRRXFE
UCIRRXFLx
6
Transmit Buffer UC 0TXBUF
Transmit State Machine
UCTXADDR
UCTXBRK
Transmit Shift Register
UCPEN UCPAR UCMSB UC7BIT
UCIREN
UCIRTXPLx
6
0
1
IrDA Encoder
UC0TX
Transmit Clock
Receive Clock
BRCLK
UCMODEx
2
UCSPB
UCRXEIE
UCRXBRKIE
Set UC0RXIFG
Set UC0TXIFG
Set RXIFG
USCI Introduction: UART Mode www.ti.com
Figure 15-1. USCI_Ax Block Diagram: UART Mode (UCSYNC = 0)
412
Universal Serial Communication Interface, UART Mode SLAU144J–December 2004–Revised July 2013
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