Datasheet

POR
Latch
S
R
PUC
Latch
S
R
Resetwd1
Resetwd2
S
S
Delay
RST/NMI
WDTNMI
†
WDTTMSEL
†
WDTQn
†
WDTIFG
†
EQU
†
MCLK
POR
PUC
S
(from flash module)
KEYV
SVS_POR
‡
0 V
V
CC
0 V
Brownout
Reset
†
From watchdog timer peripheral module
‡
Devices with SVS only
S
Invalid instruction fetch
~50 µs
www.ti.com System Reset and Initialization
2.1 System Reset and Initialization
The system reset circuitry shown in Figure 2-1 sources both a power-on reset (POR) and a power-up clear
(PUC) signal. Different events trigger these reset signals and different initial conditions exist depending on
which signal was generated.
Figure 2-1. Power-On Reset and Power-Up Clear Schematic
A POR is a device reset. A POR is only generated by the following three events:
• Powering up the device
• A low signal on the RST/NMI pin when configured in the reset mode
• An SVS low condition when PORON = 1.
A PUC is always generated when a POR is generated, but a POR is not generated by a PUC. The
following events trigger a PUC:
• A POR signal
• Watchdog timer expiration when in watchdog mode only
• Watchdog timer security key violation
• A Flash memory security key violation
• A CPU instruction fetch from the peripheral address range 0h to 01FFh
2.1.1 Brownout Reset (BOR)
The brownout reset circuit detects low supply voltages such as when a supply voltage is applied to or
removed from the V
CC
terminal. The brownout reset circuit resets the device by triggering a POR signal
when power is applied or removed. The operating levels are shown in Figure 2-2.
The POR signal becomes active when V
CC
crosses the V
CC(start)
level. It remains active until V
CC
crosses the
V
(B_IT+)
threshold and the delay t
(BOR)
elapses. The delay t
(BOR)
is adaptive being longer for a slow ramping
V
CC
. The hysteresis V
hys(B_ IT-)
ensures that the supply voltage must drop below V
(B_IT-)
to generate another
POR signal from the brownout reset circuitry.
29
SLAU144J–December 2004–Revised July 2013 System Resets, Interrupts, and Operating Modes
Submit Documentation Feedback
Copyright © 2004–2013, Texas Instruments Incorporated