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4.5.2.6 MSP430X Address Instructions
MSP430X address instructions are instructions that support 20-bit operands but have restricted
addressing modes. The addressing modes are restricted to the Register mode and the Immediate mode,
except for the MOVA instruction as listed in Table 4-16. Restricting the addressing modes removes the
need for the additional extension-word op-code improving code density and execution time. Address
instructions should be used any time an MSP430X instruction is needed with the corresponding restricted
addressing mode.
Table 4-16. Address Instructions, Operate on 20-Bit Register Data
Status Bits
(1)
Mnemonic Operands Operation
V N Z C
Rsrc,Rdst
Add source to destination register * * * *
ADDA
#imm20,Rdst
Rsrc,Rdst
#imm20,Rdst
z16(Rsrc),Rdst
EDE,Rdst
Move source to destination – – – –
MOVA &abs20,Rdst
@Rsrc,Rdst
@Rsrc+,Rdst
Rsrc,z16(Rdst)
Rsrc,&abs20
Rsrc,Rdst
Compare source to destination register * * * *
CMPA
#imm20,Rdst
Rsrc,Rdst
Subtract source from destination register * * * *
SUBA
#imm20,Rdst
(1)
* = Status bit is affected.
– = Status bit is not affected.
0 = Status bit is cleared.
1 = Status bit is set.
156
CPUX SLAU144J–December 2004–Revised July 2013
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