Datasheet

LM5642, LM5642X
www.ti.com SNVS219K –JUNE 2003–REVISED APRIL 2013
DUAL-PHASE PARALLEL OPERATION
In applications with high output current demand, the two switching channels can be configured to operate as a
two phase converter to provide a single output voltage with current sharing between the two switching channels.
This approach greatly reduces the stress and heat on the output stage components while lowering input ripple
current. The inductor ripple currents also cancel to a varying degree which results in lowered output ripple
voltage. Figure 4 shows an example of a typical two-phase circuit. Because precision current sense is the
primary design criteria to ensure accurate current sharing between the two channels, both channels must use
external sense resistors for current sensing. To minimize the error between the error amplifiers of the two
channels, tie the feedback pins FB1 and FB2 together and connect to a single voltage divider for output voltage
sensing. Also, tie the COMP1 and COMP2 together and connect to the compensation network. ON/SS1 and
ON/SS2 must be tied together to enable and disable both channels simultaneously.
EXTERNAL FREQUENCY SYNC
The LM5642 series has the ability to synchronize to external sources in order to set the switching frequency. This
allows the LM5642 to use frequencies from 150 kHz to 250 kHz and the LM5642X to use frequencies from 200
kHz to 500 kHz. Lowering the switching frequency allows a smaller minimum duty cycle, DMIN, and hence a
greater range between input and output voltage. Increasing switching frequency allows the use of smaller output
inductors and output capacitors (see Component Selection). In general, synchronizing all the switching
frequencies in multi-converter systems makes filtering of the switching noise easier.
The sync input can be from a system clock, from another switching converter in the system, or from any other
periodic signal with a logic low-level less than 1.4V and a logic high level greater than 2V. Both CMOS and TTL
level inputs are acceptable.
The LM5642 series uses a fixed delay between Channel 1 and Channel 2. The nominal switching frequency of
200kHz for the LM5642 corresponds to a switching period of 5µs. Channel 2 always turns its high-side switch on
2.5µs after Channel 1 Figure 30 (a). When the converter is synchronized to a frequency other than 200kHz, the
switching period is reduced or increased, while the fixed delay between Channel 1 and Channel 2 remains
constant. The phase difference between channels is therefore no longer 180°. At the extremes of the sync range,
the phase difference drops to 135° Figure 30 (b) and Figure 30 (c). The result of this lower phase difference is a
reduction in the maximum duty cycle of one channel that will not overlap the duty cycle of the other. As shown in
Input Capacitor Selection section, when the duty cycle D1 for Channel 1 overlaps the duty cycle D2 for Channel
2, the input rms current increases, requiring more input capacitors or input capacitors with higher ripple current
ratings. The new, reduced maximum duty cycle can be calculated by multiplying the sync frequency (in Hz) by
2.5x10
-6
(the fixed delay in seconds). The same logic applies to the LM5642X. However the LM5642X has a
nominal switching frequency of 375kHz which corresponds to a period of 2.67µs. Therefore channel 2 of the
LM5642X always begins it's period after 1.33µs.
D
MAX
= FSYNC
*
2.5x10
-6
(5)
At a sync frequency of 150 kHz, for example, the maximum duty cycle for Channel 1 that will not overlap
Channel 2 would be 37.5%. At 250 kHz, it is the duty cycle for Channel 2 that is reduced to a D
MAX
of 37.5%.
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