Datasheet

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SLES116A − AUGUST 2004 − REVISED NOVEMBER 2006
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APPLICATION INFORMATION
APPLICATION CIRCUIT
The design of the application circuit is very important in order to actually realize the high S/N ratio of which the
DSD1794A is capable. This is because noise and distortion that are generated in an application circuit are not
negligible.
In the circuit of Figure 33, the output level is 2 V RMS and 127 dB S/N is achieved. The circuit of Figure 34 can realize
the highest performance. In this case the output level is set to 4.5 V rms and 129 dB S/N is achieved (stereo mode).
In monaural mode, if the output of the L-channel and R-channel is used as a balanced output, 132 dB S/N is achieved
(see Figure 36).
Figure 35 shows a circuit for the DSD mode, which is a 4
th
-order LPF in order to reduce the out-of-band noise.
I/V Section
The current of the DSD1794A on each of the output pins (I
OUT
L+, I
OUT
L–, I
OUT
R+, I
OUT
R–) is 7.8 mA p-p at 0 dB
(full scale). The voltage output level of the I/V converter (Vi) is given by following equation:
Vi = 7.8 mA p-p × R
f
(R
f
: feedback resistance of I/V converter)
An NE5534 operational amplifier is recommended for the I/V circuit to obtain the specified performance. Dynamic
performance such as the gain bandwidth, settling time, and slew rate of the operational amplifier affects the audio
dynamic performance of the I/V section.
Differential Section
The DSD1794A voltage outputs are followed by differential amplifier stages, which sum the differential signals for
each channel, creating a single-ended I/V op-amp output. In addition, the differential amplifiers provide a low-pass
filter function.
The operational amplifier recommended for the differential circuit is the Linear Technology LT1028, because its input
noise is low.