Datasheet

DS90C032B
www.ti.com SNLS052C –MARCH 1999–REVISED APRIL 2013
Electrical Characteristics
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified
(1)(2)
Symbol Parameter Conditions Pin Min Typ Max Units
V
TH
Differential Input High Threshold +100 mV
V
CM
= +1.2V
V
TL
Differential Input Low Threshold −100 mV
R
IN+
,
R
IN−
V
IN
= +2.4V −10 ±1 +10 μA
I
IN
Input Current V
CC
= 5.5V or 0V
V
IN
= 0V −10 ±1 +10 μA
I
OH
= −0.4 mA, V
ID
= +200 mV 3.8 4.9 V
V
OH
Output High Voltage
I
OH
= −0.4 mA, Input terminated 3.8 4.9 V
V
OL
Output Low Voltage I
OL
= 2 mA, V
ID
= −200 mV R
OUT
0.07 0.3 V
I
OS
Output Short Circuit Current Enabled, V
OUT
= 0V
(3)
−15 −60 −100 mA
I
OZ
Output TRI-STATE Current Disabled, V
OUT
= 0V or V
CC
−10 ±1 +10 μA
V
IH
Input High Voltage 2.0 V
V
IL
Input Low Voltage 0.8 V
EN,
EN*
I
I
Input Current −10 ±1 +10 μA
V
CL
Input Clamp Voltage I
CL
= −18 mA −1.5 −0.8 V
EN, EN* = V
CC
or GND, Inputs Open 3.5 10 mA
No Load Supply Current, Receivers
I
CC
Enabled
EN, EN* = 2.4 or 0.5, Inputs Open 3.7 11 mA
V
CC
No Load Supply Current, Receivers
I
CCZ
EN = GND, EN* = V
CC
, Inputs Open 3.5 10 mA
Disabled
(1) Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground
unless otherwise specified.
(2) All typicals are given for: V
CC
= +5.0V, T
A
= +25°C.
(3) Output short circuit current (I
OS
) is specified as magnitude only, minus sign indicates direction only. Only one output should be shorted
at a time, do not exceed maximum junction temperature specification.
Switching Characteristics
V
CC
= +5.0V, T
A
= +25°C
(1)(2)(3)
Symbol Parameter Conditions Min Typ Max Units
t
PHLD
Differential Propagation Delay High to Low 1.5 3.40 5.0 ns
t
PLHD
Differential Propagation Delay Low to High 1.5 3.48 5.0 ns
t
SKD
Differential Skew |t
PHLD
− t
PLHD
| 0 80 600 ps
C
L
= 5 pF, V
ID
= 200 mV,
See Figure 2 and Figure 3
t
SK1
Channel-to-Channel Skew
(4)
0 0.6 1.0 ns
t
TLH
Rise Time 0.5 2.0 ns
t
THL
Fall Time 0.5 2.0 ns
t
PHZ
Disable Time High to Z 10 15 ns
t
PLZ
Disable Time Low to Z 10 15 ns
R
L
= 2 kΩ, C
L
= 10 pF,
See Figure 4 and Figure 5
t
PZH
Enable Time Z to High 4 10 ns
t
PZL
Enable Time Z to Low 4 10 ns
(1) All typicals are given for: V
CC
= +5.0V, T
A
= +25°C.
(2) Generator waveform for all tests unless otherwise specified: f = 1 MHz, Z
O
= 50Ω, t
r
and t
f
(0%–100%) ≤ 1 ns for R
IN
and t
r
and t
f
≤ 6 ns
for EN or EN*.
(3) C
L
includes probe and jig capacitance.
(4) Channel-to-Channel Skew is defined as the difference between the propagation delay of one channel and that of the others on the same
chip with an event on the inputs.
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