Datasheet

AVDD

AVSS

Temperature Sensor Monitor

To MUX TempP

To MUX TempN

Temperature ( C) =°

Temperature Reading ( V) 168,000 Vm - m

394 V/ Cm °

+ 25 C°

ADS131E04

ADS131E06

ADS131E08

SBAS561A –JUNE 2012–REVISED APRIL 2013

www.ti.com

Device Noise Measurements

Setting CHnSET[2:0] = 001 sets the common-mode voltage of [(VREFP + VREFN) / 2] to both channel inputs.

This setting can be used to test inherent device noise in the user system.

Test Signals (TestP and TestN)

Setting CHnSET[2:0] = 101 provides internally-generated test signals for use in sub-system verification at power-

up. Test signals are controlled through register settings (see the CONFIG2: Configuration Register 2 subsection

in the Register Map section for details). TEST_AMP controls the signal amplitude and TEST_FREQ controls

switching at the required frequency. The test signals are multiplexed and transmitted out of the device at the

TESTP and TESTN pins. A bit register (CONFIG2.INT_TEST = 0) deactivates the internal test signals so that the

test signal can be driven externally. This feature allows the calibration of multiple devices with the same signal.

Temperature Sensor (TempP, TempN)

The ADS131E0x contain an on-chip temperature sensor. This sensor uses two internal diodes with one diode

having a current density 16x that of the other, as shown in Figure 18. The difference in diode current densities

yields a difference in voltage that is proportional to absolute temperature.

As a result of the low thermal resistance of the package to the printed circuit board (PCB), the internal device

temperature tracks the PCB temperature closely. Note that self-heating of the ADS131E0x causes a higher

reading than the temperature of the surrounding PCB.

The scale factor of Equation 1 converts the temperature reading to °C. Before using this equation, the

temperature reading code must first be scaled to μV.

(1)

Figure 18. Temperature Sensor Measurement in the Input

Supply Measurements (MVDDP, MVDDN)

Setting CHnSET[2:0] = 011 sets the channel inputs to different device supply voltages. For channels 1, 2, 5, 6, 7,

and 8, (MVDDP – MVDDN) is [0.5(AVDD – AVSS)]; for channels 3 and 4, (MVDDP – MVDDN) is

DVDD / 4. Note that to avoid saturating the PGA while measuring power supplies, the gain must be set to '1'.

Product Folder Links: ADS131E04 ADS131E06 ADS131E08