User's Manual

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46

68P80801H45-1 1/20/2002

800/900/1500 MHz Base Radios EBTS System Manual - Vol 2

Base Radio Controller

Base Radio Controller

Functional Block Diagram

Model TLN3424

(Includes Front Panel Board)

HOST BUFFERED DATA BUS

HOST ADDRESS BUS

HOST BUFFERED DATA BUS

HOST ADDRESS BUS

HOST DATA BUS

DRAM ADDRESS

MULTIPLEXER

COLUMN/ROW

SELECT

DRAM

COLUMN

ADDRESS

DRAM

ROW

ADDRESS

16.5 MHZ CLK

SERIAL COMMUNICATIONS BUS (SCC2)

SERIAL COMMUNICATIONS BUS (SCC3)

ROW

SELECT

(RAS*)

COL

SELECT

(CAS*)

COL

SELECT

(CAS*)

ROW

SELECT

(RAS*)

DRAM

ADDRESS

DRAM

ADDRESS

HOST

ASIC

(U509)

33 MHZ

TIMING

CIRCUITRY

(Y500)

BUFFERS

(U107 - U110)

EPROM

256K X 8

(U802)

8K X 8

EEPROM

CODEPLUG

(U800)

8K X 8

SRAM

(U803)

8K X 8

SRAM

(U804)

A1-A11

A10-A22

A1-A18

A1-A18

A1-A15

HOST

ADDRESS

A1-A23

4

8

STATUS

(9 PIN D CONNECTOR

ON BRC FRONT PANEL)

RS232

(9 PIN D CONNECTOR

ON BACKPLANE)

EIA-232

BUS

RECEIVERS/

DRIVERS

(U901, U902)

EPROM

256K X 8

(U801)

SPI BUS

SPI BUS

TO/FROM

STATION MODULES

3

HOST ADDRESS BUS

NON-VOLATILE MEMORY

HOST

MICRO-

PROCESSOR

(U701)

HOST MICROPROCESSOR / HOST ASIC

DRAM

1M X 8

(U114)

DRAM

1M X 8

(U114)

HOST

ADDRESS

1-23

EIA-232

BUS

RECEIVERS/

DRIVERS

(U900)

DYNAMIC RAM

VARIOUS INPUTS

FROM BRC &

STATION CIRCUITRY

INPUT/OUTPUT PORTS CIRCUITRY

I/O PORT P0 IN

HOST DATA BUS

I/O PORT P0 OUT

I/O PORT P1 OUT

I/O PORT P2 OUT

I/O PORT P3 OUT

VARIOUS

CONTROL

LINES TO BRC &

STATION

CIRCUITRY

FROM HOST

MICROPROCESSOR

I/O PORT P1 IN

LATCHES

(U602 - U605,

U608 - U611)

BUFFERS

(U600, U601,

U606, U607)

16

16

16

16

16

16

REMOTE STATION

SHUTDOWN CIRCUITRY

SHUTDOWN

(TO POWER

SUPPLY)

28V

I/O PORT

P3 OUT

FRONT PANEL LEDS (Part of TRN7769)

LED CONTROL

LINES

(P/O I/O PORT

P0 OUT)

BASE

RADIO

POWER

SUPPLY

EXCITER PA

BRC

RX1 RX2 RX3

8

ETHERNET INTERFACE

CD

RX

TX

CLSN

RCV

TRMT

FROM

HOST

MICROPROCESSOR

ADDR BUS

DATA BUS

COPROCESSOR

ADDR BUS

COPROCESSOR

DATA BUS

10BASE2

COAX

ETHERNET

SERIAL

INTERFACE

82596DX

ETHERNET

COPROCESSOR

(U408)

ETHERNET

SERIAL

INTERFACE

(U1308)

TRANSCEIVER

(U1311)

A

HOST

INTERFACE

(U404 - U406)

ISOLATION

TRANSFORMER

(T100)

SHUTDOWN

CIRCUITRY

(U3)

BUFFERS

(U108 - U110)

BUFFERS

(U108 - U110)

DC/DC

CONVERTER

(U1310)

5 VDC

-9 VDC

23

16

20 MHZ

TIMING

CIRCUIT

(Y1300)

XMT CLK

(10 MHZ)

A1-A13

A1-A13

6

9

STATIC RAM

Figure 10 800/900 MHz QUAD Channel Base Radio Functional Block Diagram Sheet 2 of 2)