Datasheet

MAX5921/MAX5939
-48V Hot-Swap Controllers with External
R
SENSE
and High Gate Pulldown Current
______________________________________________________________________________________ 15
The lowest practical R
DS(ON)
, within budget constraints
and with values from 14mΩ to 540mΩ, are available at
100V breakdown.
Ensure that the temperature rise of Q1 junction is not
excessive at normal load current for the package select-
ed. Ensure that I
CB
current during voltage transients
does not exceed allowable transient-safe operating-area
limitations. This is determined from the SOA and tran-
sient-thermal-resistance curves in the Q1 manufacturer’s
data sheet.
Example 1:
I
LOAD
= 2.5A, efficiency = 98%, then V
DS
= 0.96V is
acceptable, or R
DS(ON)
≤ 384mΩ at operating temper-
ature is acceptable. An IRL520NS 100V NMOS with
R
DS(ON)
≤ 180mΩ and I
D(ON)
= 10A is available in
D
2
PAK. (A Vishay Siliconix SUD40N10-25 100V NMOS
with R
DS(ON)
≤ 25mΩ and I
D(ON)
= 40A is available in
DPAK but may be more costly because of a larger die
size).
Using the IRL520NS, V
DS
≤ 0.625V even at +80°C so effi-
ciency ≥ 98.6% at 80°C. P
D
≤ 1.56W and junction temper-
ature rise above case temperature would be 5°C due to
the package θ
JC
= 3.1°C/W thermal resistance. Of
course, using the SUD40N10-25 will yield an efficiency
greater than 99.8% to compensate for the increased cost.
If I
CB
is set to twice I
LOAD
, or 5A, V
DS
momentarily dou-
bles to ≤ 1.25V. If C
OUT
= 4000µF, transient-line input
voltage is ∆36V, the 5A charging-current pulse is:
Entering the data sheet transient-thermal-resistance
curves at 1ms provides a θ
JC
= 0.9°C/W. P
D
= 6.25W,
so ∆t
JC
= 5.6°C. Clearly, this is not a problem.
Example 2:
I
LOAD
= 10A, efficiency = 98%, allowing V
DS
= 0.96V
but R
DS(ON)
≤ 96mΩ. An IRF530 in a D
2
PAK exhibits
R
DS(ON)
≤ 90mΩ at +25°C and ≤ 135mΩ at +80°C.
Power dissipation is 9.6W at +25°C or 14.4W at +80°C.
Junction-to-case thermal resistance is 1.9°C/W, so the
junction temperature rise would be approximately 5°C
above the +25°C case temperature. For higher efficien-
cy, consider IRL540NS with R
DS(ON)
≤ 44mΩ. This
allows η = 99%, P
D
≤ 4.4W, and T
JC
= +4°C
(θ
JC
= 1.1°C/W) at +25°C.
Thermal calculations for the transient condition yield
I
CB
= 20A, V
DS
= 1.8V, t = 0.5ms, transient θ
JC
=
0.12°C/W, P
D
= 36W and ∆t
JC
= 4.3°C.
Layout Guidelines
Good thermal contact between the MAX5921/MAX5939
and the external MOSFET is essential for the thermal-
shutdown feature to operate effectively. Place the
MAX5921/MAX5939 as close as possible to the drain of
the external MOSFET and use wide circuit-board traces
for good heat transfer. See Figure 15 for an example of
recommended layout for Kelvin-sensing current
through a sense resistor on a PC board.
t
Fx V
A
ms
.
==
4000 1 25
5
1
µ
500µs x 128
V
OL
V
SENSE
V
GATE
t
1
t
3H
t
5H
t
2L
t
4L
Figure 14. MAX5921A Overcurrent Fault Example
SENSE RESISTOR
HIGH-CURRENT PATH
MAX5921
MAX5939
SENSE V
EE
Figure 15. Recommended Layout for Kelvin-Sensing Current
Through Sense Resistor