Datasheet

(V
DD
= +1.7V to +5.5V, V
H_
= V
DD
, V
L_
= 0V, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at V
DD
= +1.8V,
T
A
= +25°C.) (Note 1)
Note 1: All devices are 100% production tested at T
A
= +25°C. Specifications over temperature limits are guaranteed by design and
characterization.
Note 2: DNL and INL are measured with the potentiometer configured as a voltage-divider (Figure 1) with H_ = V
DD
and L_ = GND.
The wiper terminal is unloaded and measured with a high-input-impedance voltmeter.
Note 3: R-DNL and R-INL are measured with the potentiometer configured as a variable resistor (Figure 1). DNL and INL are mea-
sured with the potentiometer configured as a variable resistor. H_ is unconnected and L_ = GND. For V
DD
= +5V, the wiper
terminal is driven with a source current of 400µA for the 10kΩ configuration, 80µA for the 50kΩ configuration, and 40µA for
the 100kΩ configuration. For V
DD
= +1.7V, the wiper terminal is driven with a source current of 150µA for the 10kΩ configu-
ration, 30µA for the 50kΩ configuration, and 15µA for the 100kΩ configuration.
Note 4: The wiper resistance is the value measured by injecting the currents given in Note 3 into W_ with L_ = GND.
R
W_
= (V
W_
- V
H_
)/I
W_
.
Note 5: Drive HA with a 1kHz GND to V
DD
amplitude tone. LA = LB = GND. No load. WB is at midscale with a 10pF load. Measure
WB.
Note 6: The wiper-settling time is the worst-case 0 to 50% rise time, measured between tap 0 and tap 127. H_ = V
DD
, L_ = GND,
and the wiper terminal is loaded with 10pF capacitance to ground.
Note 7: Digital timing is guaranteed by design and characterization, not production tested.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Wiper Settling Time (Note 6) t
S
MAX5391L/MAX5393L 400
nsMAX5391M/MAX5393M 1200
MAX5391N/MAX5393N 2200
Charge-Pump Feedthrough at W_ V
RW
f
CLK
= 600kHz, C
OUT
= 0nF 200 nV
P-P
POWER SUPPLIES
Supply Voltage Range V
DD
1.7 5.5 V
Standby Current
V
DD
= 5.5V 27
µA
V
DD
= 1.7V 12
DIGITAL INPUTS
Minimum Input High Voltage V
IH
V
DD
= 2.6V to 5.5V 70
% x V
DD
V
DD
= 1.7V to 2.6V 75
Maximum Input Low Voltage V
IL
V
DD
= 2.6V to 5.5V 30
% x V
DD
V
DD
= 1.7V to 2.6V 25
Input Leakage Current -1 +1 µA
Input Capacitance 5 pF
TIMING CHARACTERISTICS—SPI (Note 7)
SCLK Frequency f
MAX
10 MHz
SCLK Clock Period t
CP
100 ns
SCLK Pulse-Width High t
CH
40 ns
SCLK Pulse-Width Low t
CL
40 ns
CS Fall to SCK Rise Setup Time
t
CSS
40 ns
SCLK Rise to CS Rise Hold Time
t
CSH
0 ns
DIN Setup Time t
DS
40 ns
DIN Hold Time t
DH
0 ns
SCLK Rise to CS Fall Delay
t
CS0
10 ns
SCLK Rise to SCLK Rise Hold Time t
CS1
40 ns
CS Pulse-Width High t
CSW
100 ns
MAX5391/MAX5393 Dual 256-Tap, Volatile, Low-Voltage
Linear Taper Digital Potentiometers
www.maximintegrated.com
Maxim Integrated │ 3
Electrical Characteristics (continued)