Datasheet
MAX4598
Low-Voltage, Combination Single-Ended
8-to-1/Differential 4-to-1 Multiplexer
8 _______________________________________________________________________________________
Truth Table
NO7x0
NO8x0
NO1x1
NO3x1
NO5x1
NO3x0
NO4x0
NO5x0
NO6x0
NO2x0
NO1x0
A3
State is latched on the
rising edge of LATCH
x
High-Zxx
COMALATCH
V+x1
NO8x1
High-Zx1
NO7x1
GNDx1
1
1
0
0
0
0
0
1
1
0
0
A2
x
x
1
1
1
0
1
1
1
0
0
1
1
1
0
0
0
0
A1
x
x
0
1
1
0
1
0
1
0
1
0
0
1
0
1
1
0
A0
x
x
1
0
1
1
0
1
1
1
1
1
1
1
1
1
1
1
EN
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
x
NLATCH
1
1
1
1
1
GND
GND
NO2
NO4
NO6
GND
GND
GND
GND
GND
GND
State is latched on the
rising edge of LATCH
High-Z
COMB
GND
NO8
High-Z
NO8
GND
x = Don’t care
Virtually all the analog leakage current is through the
ESD diodes. Although the ESD diodes on a given sig-
nal pin are identical, and therefore fairly well balanced,
they are reverse-biased differently. Each is biased by
either V+ or V- and the analog signal. This means their
leakage varies as the signal varies. The difference in
the two diodes’ leakage from the signal path to the V+
and V- pins constitutes the analog signal-path leakage
current. All analog leakage current flows to the supply
terminals, not to the other switch terminal. This explains
how both sides of a given switch can show leakage
currents of either the same or opposite polarity.
There is no connection between the analog signal
paths and GND. The analog signal paths consist of an
N-channel and a P-channel MOSFET, with their sources
and drains paralleled and their gates driven out of
phase with V+ and V- by the logic-level translators.
V+ and GND power the internal logic and logic-level
translators, and set the input logic thresholds. The
logic-level translators convert the logic levels to
switched V+ and V- signals to drive the analog switch
gates. This drive signal is the only connection between
the logic supplies and the analog supplies. All pins
have ESD protection to V+ and to V-.
Increasing V- has no effect on the logic-level thresh-
olds, but it does increase the drive to the P-channel
switches, reducing their on-resistance. V- also sets the
negative limit of the analog signal voltage.
The logic-level thresholds are CMOS- and TTL-compat-
ible when V+ is +5V. As V+ is raised, the threshold
increases slightly; when V+ reaches +12V, the level
threshold is about 3.2V, which is above the TTL output
high-level minimum of 2.4V but still compatible with
CMOS outputs.
Bipolar-Supply Operation
The MAX4598 operates with bipolar supplies between
±2.7V and ±6V. The V+ and V- supplies need not be
symmetrical, but their sum cannot exceed the absolute
maximum rating of 13V. Do not connect the MAX4598
V+ pin to +3V and connect the logic-level input pins
to TTL logic-level signals. TTL logic-level outputs
can exceed the absolute maximum ratings, causing
damage to the part and/or external circuits.