Datasheet

MAX17094
Internal-Switch Boost Regulator with Integrated
7-Channel Driver, VCOM Calibrator, Op Amp, and LDO
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Detailed Description
The MAX17094 includes a high-performance step-up
regulator, a 250mA LDO linear regulator, a high-speed
operational amplifier, a digitally adjustable VCOM cali-
bration device with nonvolatile memory and I
2
C inter-
face, and a high-voltage, level-shifting scan driver
optimized for active-matrix TFT LCDs.
Step-Up Regulator
The step-up regulator employs a peak current-mode
control architecture with an adjustable (600kHz to
1.2MHz), constant-switching frequency that maximizes
loop bandwidth and provides a fast-transient response
to pulsed loads found in source drivers of TFT LCD
panels. The high switching frequency is programmable
from 450kHz to 1.2MHz by selecting an appropriate
external resistor connected between the FREQ input
and AGND. The high switching frequency also allows
the use of low-profile inductors and ceramic capacitors
to minimize the thickness of LCD panel designs. The
integrated high-efficiency MOSFET and the IC’s built-in
digital soft-start functions reduce the number of exter-
nal components required while controlling inrush cur-
rent. The output voltage can be set from V
IN
to 14V with
an external resistive voltage-divider.
The regulator controls the output voltage and the power
delivered to the output by modulating the duty cycle (D)
of the internal power MOSFET in each switching cycle.
The duty cycle of the MOSFET is approximated by:
Figure 4 shows the block diagram of the step-up regu-
lator. An error amplifier compares the signal at FB to
1.235V and changes the COMP output. The voltage at
COMP determines the current trip point each time the
internal MOSFET turns on. As the load varies, the error
amplifier sources or sinks current to the COMP output
accordingly to produce the inductor peak current nec-
essary to service the load. To maintain stability at high
duty cycles, a slope compensation signal is summed
with the current-sense signal.
On the rising edge of the internal clock, the controller
sets a flip-flop, turning on the n-channel MOSFET and
applying the input voltage across the inductor. The cur-
rent through the inductor ramps up linearly, storing
energy in its magnetic field. Once the sum of the cur-
rent-feedback signal and the slope compensation
exceed the COMP voltage, the controller resets the flip-
flop and turns off the MOSFET. Since the inductor cur-
rent is continuous, a transverse potential develops
across the inductor that turns on the diode (D1). The
voltage across the inductor then becomes the differ-
ence between the output voltage and the input voltage.
This discharge condition forces the current through the
inductor to ramp back down, transferring the energy
stored in the magnetic field to the output capacitor and
the load. The MOSFET remains off for the rest of the
clock cycle.
Undervoltage Lockout (UVLO)
The undervoltage lockout (UVLO) circuit compares the
input voltage at IN with the UVLO (1.3V typ) to ensure
that the input voltage is high enough for reliable opera-
tion. The 200mV (typ) hysteresis prevents supply tran-
sients from causing a restart. Once the input voltage
exceeds the UVLO-rising threshold, startup begins.
When the input voltage falls below the UVLO falling
threshold, the controller turns off the main step-up regu-
lator and the linear regulator, disables the switch-con-
trol block, and the operational amplifier output
becomes high impedance.
D
VV
V
MAIN IN
MAIN
≈
-
SOFT-
START
OSCILLATOR
1.235V
FB
LX
ILIM
COMPARATOR
I
LIMIT
CURRENT
SENSE
PGND
COMP
CLOCK
ERROR AMP
PWM
COMPARATOR
SLOPE COMP
LOGIC AND DRIVER
Figure 4. Step-Up Regulator Block Diagram