Datasheet
AD9851
–21
–
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
9
8
7
6
5
4
3
2
12
13
14
15
16
17
18
19
11 1
STROBE
D0
D1
D2
D3
D4
D5
D6
D7
U2
74HCT574
J1
C36CPR2
RRSET
8D
7D
6D
5D
4D
3D
2D
1D
8Q
7Q
6Q
5Q
4Q
3Q
2Q
1Q
CK
OE
FFQUD
WWCLK
CHECK
STROBE
V
CC
Y1
OUT
GND
7
8
14
5V
XTAL
OSC
(OPTIONAL)
R2
50
J5
CLKIN
REMOVE WHEN
USING Y1
H1
#6
H2
#6
H3
#6
H4
#6
MOUNTING HOLES
R3
2.2k
STROBE
5V
WWCLKFFQUDRRESET
R11
2.2k
R9
2.2k
R10
2.2k
J2
+V
J3
5V
J4
GND
BANANA
JACKS
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
VOUTP
VOUTN
R
SET
AVDD
AGND
REFCLOCK
FQ UD
D3
D2
D1
D0
W CLK
PVCC
PGND
VINN
VINP
DACBL
AVDD
AGND
IOUTB
IOUT
D4
D5
D6
D7
RESET
DVDD
DGND
U1
AD9851
+V
GND
CLKIN
FQUD
D3
D2
D1
D0
WCLK
+V
GND
+V
GND
D4
D5
D6
D7
RESET
+V
GND
R5
100k
R12
J7
BNC
R1
3.9k
10mA
RESET
C1
470pF
E1 E2
R4
100k
E6 E5
R6
200
C11
22pF
C12
1pF
L1
470nH
C13
33pF
C14
5.6pF
L2
390nH
C15
22pF
C16
4.7pF
L3
390nH
C17
22pF
R7
200
70MHz ELLIPTICAL LOW-PASS FILTER
7TH ORDER 200 Z
TO BYPASS ON BOARD FILTER
1. REMOVE E6 TO E5 JUMPER
2. INSTALL APPROPRIATE R12 FOR IOUT TERMINATION
R8
100
J6
E4 E3
J8
BNC
J9
BNC
9
8
7
6
5
4
3
2
12
13
14
15
16
17
18
19
8D
7D
6D
5D
4D
3D
2D
1D
8Q
7Q
6Q
5Q
4Q
3Q
2Q
1Q
CK
OE
11 1
STROBE
RESET
WCLK
FQUD
CHECK
U3
74HCT574
RRESET
WWCLK
FFQUD
RRESET
AD9851/CGPCB
CLOCK GENERATOR
EVALUATION BOARD
(SSOP PACKAGE)
C2
0.1F
C3
0.1F
C4
0.1F
C5
0.1F
C8
0.1F
C9
0.1F
C10
0.1F
+V
5V
C6
10F
C7
10F
+V
5V
NC
NC = NO CONNECT
Figure 24. CGPCB Electrical Schematic
REV. D