Datasheet

AD811
Rev. E | Page 16 of 20
A VIDEO KEYER CIRCUIT
By using two AD834 multipliers, an AD811, and a 1 V dc source,
a special form of a two-input VCA circuit called a video keyer
can be assembled. Keying is the term used in reference to blend-
ing two or more video sources under the control of a third
signal or signals to create such special effects as dissolves and
overlays. The circuit shown in Figure 48 is a two-input keyer,
with video inputs V
A
and V
B
, and a control input V
G
. The
transfer function (with V
OUT
at the load) is given by
V
OUT
= GV
A
+ (1−G)V
B
where G is a dimensionless variable (actually, just the gain of the
A signal path) that ranges from 0 when V
G
= 0 to 1 when V
G
=
1 V. Thus, V
OUT
varies continuously between V
A
and V
B
as G
varies from 0 to 1.
Circuit operation is straightforward. Consider first the signal
path through U1, which handles video input V
A
. Its gain is
clearly 0 when V
G
= 0, and the scaling chosen ensures that it has
a unity value when V
G
= 1 V; this takes care of the first term of
the transfer function. On the other hand, the V
G
input to U2 is
taken to the inverting input X2 while X1 is biased at an accurate
1 V. Thus, when V
G
= 0, the response to video input V
B
is already
at its full-scale value of unity, whereas when V
G
= 1 V, the differ-
ential input X1−X2 is 0. This generates the second term.
The bias currents required at the output of the multipliers are
provided by R8 and R9. A dc level-shifting network comprising
R10/R12 and R11/R13 ensures that the input nodes of the
AD811 are positioned at a voltage within its common-mode
range. At high frequencies, C1 and C2 bypass R10 and R11,
respectively. R14 is included to lower the HF loop gain and is
needed because the voltage-to-current conversion in the
AD834s, via the Y2 inputs, results in an effective value of the
feedback resistance of 250 Ω; this is only about half the value
required for optimum flatness in the AD811’s response. (Note
that this resistance is unaffected by G: when G = +1, all the
feedback is via U1, while when G = 0 it is all via U2). R14
reduces the fractional amount of output current from the
multipliers into the current-summing inverting input of the
AD811 by sharing it with R8. This resistor can be used to adjust
the bandwidth and damping factor to best suit the application.
U3
AD811
7
6
4
3
2
+
–
X2
X1 +V
S
W1
Y1 Y2 W2
–V
S
U1
AD834
1234
8765
X2
X1 +V
S
W1
Y1 Y2 W2
–V
S
U1
AD834
1234
8765
R8
29.4Ω
29.4Ω
R9
R12
6.98kΩ
6.98kΩ
R13
R10
2.49kΩ
C3
FB
V
OUT
FB
V
G
R6
226Ω
R7
45.3Ω
+5V
–5V
+5V
U4
AD589
R5
113Ω
(0 TO +1V dc)
V
A
(±1V FS)
–5V
R4
1.02kΩ
R3
100Ω
R2
174Ω
R1
1.87kΩ
V
B
(±1V FS)
+5V
–5V
C1
0.1µF
0.1µF
0.1µF
0.1µF
R14
SEE TEXT
+5V
–5V
C4
C2
R11
2.49kΩ
LOAD
GND
LOAD
GND
200Ω
TO Y2
TO PIN 6
AD811
SETUP FOR DRIVING
REVERSE-TERMINATED LOAD
Z
O
Z
O
200Ω
V
OUT
INSET
00866-E-048
Figure 48. A Practical Video Keyer Circuit