User's Manual
Table Of Contents
- Legal Information
- 1 About This Document
- 2 Product Overview
- 3 Interfaces
- 3.1 Definition of PINs
- 3.2 Working Condition
- 3.3 Feature of Interface Power Level
- 3.4 Power Interface
- 3.5 (U)SIM Card Interface
- 3.6 SD Card Interface
- 3.7 USB2.0 Interface
- 3.8 Serial Interface
- 3.9 JTAG (Joint Test Action Group) Interface
- 3.10 Power-on/Power-off & Reset Signal
- 3.11 Interactive Application Interface
- 3.12 LED Indicator Interface
- 4 Electric Feature
- 5 Technical Index of Radio Frequency
- 6 Related Test & Testing Standard
- 7 Design Guide
- 7.1 General Design Rule & Requirement
- 7.2 Power Supply Circuit Design
- 7.3 RF Circuit Design
- 7.4 Suggestions for EMC & ESD Design
- 7.5 Suggestions for PCB Wielding Panel Design
- 7.6 Suggestions for Heat-dissipation Design
- 7.7 Recommended Product Upgrading Plan
- 8 Manufacturing Guide
- 9 FCC Regulations:
Hardware Development Guide of Module Product
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Figure 4-1 Power-on Sequence Chart of ZM5202 Module
VPH_PWR
USB_VBUS
POWER_ON
T1
T2
T3
Figure 4-2 Power-off Sequence Chart of ZM5202 Module
POWER_ON
T5
T4
VPH_PWR
USB_VBUS
Table 4-3 Power-on/Power-off Time
Parameter Description Min Typical Max Unit
T1 From powering on VPH_PWR to
establishing USB_VBUS
0 0.5 1 second
T2 From powering on VPH_PWR to
Power-on taking effect
1 1.5 -- second
T3 The period that the Power-on signal
for power on operation is kept on
the low PWL
0.05 0.1 -- second
T4 The period that the Power-on signal
for power off operation is kept on
the low PWL
4 5 -- second
T5 From the releasing the Power-on
button for power off operation to the
power off of VPH_PWR and
USB_VBUS
1 2 -- second