Yuga CLM920 TD5 LTE Module Hardware Manual

CLM920_TD5 LTE Module Hardware Manual
19
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YuGe Information Technology Co.,Ltd
28
PWRKEY
NC
NC
NC
3.4.1 Power-on sequence
Figure 3- 8 Power-on sequence diagram
Table 3- 5 Power-on sequence parameters
Symbol
Description
Min
Typical
Max
Unit
Ton
Low level width of boot
100
500
-
ms
Ton(statu
s)
Boot time(Judge by the
status)
22
-
-
ms
Ton(usb)
Boot time(Judge by the
USB)
-
20
-
ms
Ton(uart)
Boot time(Judge by the
UART)
-
20
-
ms
VIH
PWRKEY high level input
0.6
0.8
1.8
V
VIL
PWRKEY low level input
-0.3
0
0.5
V
3.4.2 Power off
The module without a normal shutdown process when turn it off by cutting off the VBAT
power supply. Only if the module is abnormal and can’t restart by AT, cutting off the
VBAT power supply can be used。
3.4.3 Reset control
CLM920_TD5 Mini PCIE module’s reset pin is 22. Pull this pin low 150-450 ms to reset
Ton
Ton(status)
Ton(usb)
Active
USB
Active
UART
STATUS
RESET
PWRKEY
VBAT
Ton(uart)