Data Sheet

ManualsBrandsUnbranded ManualsActive ComponentsSN74HC595N Logic IC - Shift register Three-state Shift register PDIP 16

SN54HC595...J OR W PACKAGE

SN74HC595...D, DB, DW, N, NS, OR PW PACKAGE

(TOP VIEW)

SN54HC595...FK PACKAGE

(TOP VIEW)

NC – No internal connection

GND

SER

RCLK

SRCLK

SRCLR

′

3 2 1 2 0 1 9

9 10 11 12 1 3

SER

RCLK

SRCLK

SRCLR

GND

SN54HC595

SN74HC595

www.ti.com

SCLS041H –DECEMBER 1982–REVISED NOVEMBER 2009

8-BIT SHIFT REGISTERS WITH 3-STATE OUTPUT REGISTERS

Check for Samples: SN54HC595 SN74HC595

FEATURES

• 8-Bit Serial-In, Parallel-Out Shift

• Wide Operating Voltage Range of 2 V to 6 V

• High-Current 3-State Outputs Can Drive Up To

15 LSTTL Loads

• Low Power Consumption: 80-μA (Max) I

• t

= 13 ns (Typ)

• ±6-mA Output Drive at 5 V

• Low Input Current: 1 μA (Max)

• Shift Register Has Direct Clear

DESCRIPTION

The 'HC595 devices contain an 8-bit serial-in,

parallel-out shift register that feeds an 8-bit D-type

storage register. The storage register has parallel

3-state outputs. Separate clocks are provided for both

the shift and storage register. The shift register has a

direct overriding clear (SRCLR) input, serial (SER)

input, and serial outputs for cascading. When the

output-enable (OE) input is high, the outputs are in

the high-impedance state.

Both the shift register clock (SRCLK) and storage

both clocks are connected together, the shift register

always is one clock pulse ahead of the storage

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (27 pages)

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SN54HC595 SN74HC595 www.ti.com SCLS041H – DECEMBER 1982 – REVISED NOVEMBER 2009 8-BIT SHIFT REGISTERS WITH 3-STATE OUTPUT REGISTERS Check for Samples: SN54HC595 SN74HC595 FEATURES 1 • • • • • • • • 8-Bit Serial-In, Parallel-Out Shift Wide Operating Voltage Range of 2 V to 6 V High-Current 3-State Outputs Can Drive Up To 15 LSTTL Loads Low Power Consumption: 80-μA (Max) ICC tpd = 13 ns (Typ) ±6-mA Output Drive at 5 V Low Input Current: 1 μA (Max) Shift Register Has Direct Clear SN54HC595...
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SN54HC595 SN74HC595 SCLS041H – DECEMBER 1982 – REVISED NOVEMBER 2009 www.ti.
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SN54HC595 SN74HC595 www.ti.com SCLS041H – DECEMBER 1982 – REVISED NOVEMBER 2009 LOGIC DIAGRAM (POSITIVE LOGIC) OE RCLK SRCLR SRCLK SER 13 12 10 11 14 1D C1 R 3R C3 3S 15 2S 2R C2 R 3R C3 3S 1 2S 2R C2 R 3R C3 3S 2 2S 2R C2 R 3R C3 3S 3 2S 2R C2 R 3R C3 3S 4 2S 2R C2 R 3R C3 3S 5 2S 2R C2 R 3R C3 3S 6 2S 2R C2 R 3R C3 3S 7 QA QB QC 9 QD QE QF QG QH QH′ Pin numbers shown are for the D, DB, DW, J, N, NS, PW, and W packages.
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SN54HC595 SN74HC595 SCLS041H – DECEMBER 1982 – REVISED NOVEMBER 2009 www.ti.com TIMING DIAGRAM SRCLK SER RCLK SRCLR OE QA QB QC QD QE QF QG QH QH’ NOTE: 4 implies that the output is in 3-State mode.
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SN54HC595 SN74HC595 www.ti.com SCLS041H – DECEMBER 1982 – REVISED NOVEMBER 2009 ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) VCC Supply voltage range IIK Input clamp current (2) −0.
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SN54HC595 SN74HC595 SCLS041H – DECEMBER 1982 – REVISED NOVEMBER 2009 www.ti.com ELECTRICAL CHARACTERISTICS over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = −20 μA VOH VI = VIH or VIL QH′, IOH = −4 mA QA−QH, IOH = −6 mA QH′, IOH = −5.2 mA QA−QH, IOH = −7.8 mA IOL = 20 μA VOL VI = VIH or VIL QH′, IOL = 4 mA QA−QH, IOL = 6 mA QH′, IOL = 5.2 mA QA−QH, IOL = 7.8 mA II TA = 25°C MIN TYP SN54HC595 MAX MIN MAX SN74HC595 MIN 2V 1.9 1.
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SN54HC595 SN74HC595 www.ti.com SCLS041H – DECEMBER 1982 – REVISED NOVEMBER 2009 TIMING REQUIREMENTS over operating free-air temperature range (unless otherwise noted) VCC fclock Clock frequency SRCLK or RCLK high or low tw Pulse duration SRCLR low SER before SRCLK↑ SRCLK↑ before RCLK↑ (1) tsu Setup time SRCLR low before RCLK↑ SRCLR high (inactive) before SRCLK↑ th (1) Hold time, SER after SRCLK↑ TA = 25°C MIN SN54HC595 MAX MIN MAX SN74HC595 MIN MAX 2V 6 4.2 5 4.
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SN54HC595 SN74HC595 SCLS041H – DECEMBER 1982 – REVISED NOVEMBER 2009 www.ti.com SWITCHING CHARACTERISTICS over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) PARAMETER FROM (INPUT) TO (OUTPUT) fmax SRCLK QH′ tpd QA−QH RCLK tPHL ten tdis SRCLR QH′ QA−QH OE QA−QH OE QA−QH tt QH′ VCC TA = 25°C MIN TYP SN54HC595 MAX MIN MAX SN74HC595 MIN 2V 6 26 4.2 5 4.5 V 31 38 21 25 6V 36 42 25 29 MAX UNIT MHz 2V 50 160 240 200 4.
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SN54HC595 SN74HC595 www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 18-Oct-2013 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties.
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PACKAGE MATERIALS INFORMATION www.ti.com 5-Oct-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74HC595DBR SSOP DB 16 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1 SN74HC595DR SOIC D 16 2500 330.0 16.8 6.5 10.3 2.1 8.0 16.0 Q1 SN74HC595DRG3 SOIC D 16 2500 330.0 16.8 6.5 10.3 2.1 8.0 16.
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PACKAGE MATERIALS INFORMATION www.ti.com 5-Oct-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74HC595DBR SSOP DB 16 2000 367.0 367.0 38.0 SN74HC595DR SOIC D 16 2500 364.0 364.0 27.0 SN74HC595DRG3 SOIC D 16 2500 364.0 364.0 27.0 SN74HC595DRG4 SOIC D 16 2500 367.0 367.0 38.0 SN74HC595DRG4 SOIC D 16 2500 333.2 345.9 28.6 SN74HC595DWR SOIC DW 16 2000 366.0 364.0 50.
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MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
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