Microcomputer Product Guide

04 05
Product line-up
Toshiba has newly developed TLCS-870/C1 Series of 8-bit microcontrollers that deliver high-speed processing capability equivalent to 16-bit
microcontrollers. The TLCS-870/C1 Series achieves high-speed processing capability at low internal clock frequencies by operating one instruction
cycle in a single clock cycle. Toshiba's proprietary memory segment method allows addressing up to 128 Kbytes of memory address space.
16-bit
8-bit
32-bit
32-bit
8-bit Flash microcontrollers based on TLCS-870/C1 core
The new 8-bit CPU core delivering high-speed processing capability and memory address space extension, while offering instruction code compatibility with TLCS-870/C
NEW
NEW
8-Bit Microcontrollers
TLCS-870/X
TLCS-870/C
TLCS-870
TLCS-870/C1
TLCS-900/L1
TLCS-900/H1
High-Speed
TLCS-900/H1
NEW
Performance
Low power consumption
Low noise
Core architecture optimized
for C compiler
Minimum instruction execution
time: 250 ns
Minimum instruction execution time: 125 ns
Minimum instruction execution time: 111 ns
Minimum instruction execution
time: 125 ns
Minimum instruction execution
time: 50 ns
Address space extended to 1 Mbyte
8-bit microcontrollers
16-bit 32-bit8-bit
TMP89FS60UG/FG
✽✽
General-purpose 64-pin product providing various interfaces for serial communications and a timer system
Flash version or mask version can be selected.
16KB
42-pin 44-pin 48-pin 64-pin 80-pin 100-pin
32KB
60KB
96KB
ROM
L
LCD driver built-inStandard product
LLL
LL
L
870/C1 Series road map (planned)
✽✽
: Under development
++
: Under planning
Part Number
TMP89CM60UG/FG
++
TMP89CS60UG/FG
++
TMP89FS60UG/FG
✽✽
ROM
32 KB
60 KB
60 KB
RAM
3.0 KB
3.0 KB
3.0 KB
8KB
16KB
32KB
64KB
96KB
128KB
Program size (data + code)
1
1
2 3 4
Accessible to the address
space (128 Kbytes)
doubled over 870/C by
the segment method
TLCS-870/C1 Series: Minimum instruction execution time of 125 ns
TLCS-870/C Series: Minimum instruction execution time of 250 ns
*The minimum instruction execution time is reduced by half compared to TLCS-870/C.
Advantages of low-frequency operation
TLCS-870/C Series
64 Kbytes (data + code)
TLCS-900/L1 Series
TLCS-870/C1 Series
128 Kbytes (Max)
Code: 64 Kbytes
Data: 64 Kbytes
Segment method
New
High-speed processing at a low clock frequency
Toshiba's proprietary memory management method (segment method)
Address space extendable to 128 Kbytes
One instruction cycle operated in a single clock cycle
Toshiba's proprietary memory segment method manages
instruction codes and data independently in separate memory
address spaces. This new method enables memory address space
extension without affecting processing speed or code efficiency for
small- to large-sized programs exceeding 64 Kbytes.
The core architecture is configured to reduce the number of clock
cycles required to complete one machine cycle to a single clock
cycle. This achieves processing performance four times that of
TLCS-870/C Series at the same internal clock frequency.
Features of TLCS-870/C1 Series
Toshiba Integrated Development Environment (TIDE)
Emulators
Development System
Toshiba microcontroller core line-up
C Compiler
Assembler
Build Manager
Debugger
Linker
Framework
Editor
*Under development. Specifications are subject to change without notice.
On-chip debug emulator In-circuit emulator
Toshiba Microcontrollers TLCS-870/C1 Series
Realizing processing capability equivalent to 16-bit microcontrollers and
memory address space extendable up to 128 Kbytes
Suitable for high-performance
and multifunctional home
appliances, audio equipment
and portable devices
TLCS-900 Family
8-bit microcontrollers
High-speed processing capability
equivalent to 16-bit microcontrollers
Address space extended to 128 Kbytes
5-V operation
On-chip debug function
TLCS-870 Family Suitable for home appliances
TLCS-870/C1 Core
Operating voltage: 4.5 to 5.5 V at 8 MHz, 2.7 to 5.5 V at 4.2 MHz
Clock gear: 1/4, 1/2, 1/1
Built-In Functions
Voltage detecting circuit
(Two voltage levels detectable, reset or interrupt selectable)
Power-on reset circuit
(Threshold voltage: 2.4 V
0.2 V)
8-bit timer/counter: 4 channels
(Resolution: 125 ns at 8 MHz)
16-bit timer/counter: 2 channels
(Resolution: 250 ns at 8 MHz)
UART/SIO*: 2 channels
(UART: 128 Kbps, SIO: 4 Mbps at 8 MHz)
UART: 1 channel
(UART: 128 Kbps at 8 MHz)
I
2
C/SIO*: 1 channel
(I
2
C: 400 Kbps, SIO: 4 Mbps at 8 MHz)
* Two SIO channels can be used simultaneously.
10-bit AD converter: 16 channels
Built-in pull-up resistors
On-chip debug function (Flash version only)
8 MHz
Analog
input
TXD/RXD
SCLK/SI/
SO
SDA/SCL/
SCLK/SI/
SO
TXD/RXD
32 kHz
Pulse output
Timer/counter
input
Pulse output
Timer/counter
input
Interrupt
I/O port
POR/
VLTD
ROM
10-bit
AD
(16ch)
UART/
SIO
(2ch)
I
2
C/
SIO
(1ch)
UART
(1ch)
RAM
870/C1
Core
8-bit
timer
(4ch)
16-bit
timer
(2ch)
I/O
56
Packages:
UG: 64-pin LQFP (10 mm x 10 mm/0.50-mm pitch)
FG: 64-pin QFP (14 mm x 14 mm/0.80-mm pitch)
Internal clock
TLCS-870/C
Series
TLCS-870/C1
Series
One machine cycle
One machine cycle
◆ Compared to the TLCS-870/C, power consumption can be reduced at the
same performance level.
◆ Noise generation can be reduced.
At higher frequencies...
Low-frequency
operation
(8 MHz)
(16 MHz 24 MHz 32 MHz)
Code and data in the same area
64-Kbyte code
segment
64-Kbyte data
segment
Code
Data
Code
Additional code
Data
Code: Instruction op-codes and operands
Data: Sources and destinations of load and arithmetic instructions, etc.
Conventional 8-bit product
Segment method
Software design facilitated Compact core and object sizes
Compared to the address bus
extension method, core and code
sizes are reduced. The instruction
set is compatible with TLCS-
870/C.
Unlike the bank switching method, small- to
large-sized programs need not be modified.
Processing speed and code efficiency are
unaffected even if the code size exceeds 64
Kbytes.
Using the Integrated Development Environment (IDE) together with C
Compiler enables seamless operations of coding, building and debugging
tasks which must be performed repeatedly in the software development
process. Toshiba development tools offer a variety of latest functions to
realize a user-friendly and highly efficient debug environment.
*The target system requires a separate power supply.
*The target system requires a separate power supply.
Target
system
Host
system
USB
Control
interface
cable
RTE870/C1
on-chip
debug
emulator
Target
system
Host
system
USB
MCU
probe
RTE870/C1
emulator
Business-card-sized compact emulator
No need for power supply (using USB bus power)
Target connection via a narrow-pitched cable
Extensive on-chip debug functions
Break/event : 8 breakpoints/1 event
Trace :
The last two branches
can be stored in real time.
Memory access : Display/Rewrite during
program execution in 1-byte units
(with a wait of 1 clock cycle)
Debug pin : Two I/O pins
Flash programming function
IDE included (downloadable from website)
Compact, low-cost, yet highly functional in-circuit emulator
(compared to RTE870/C model 15)
Various 870/C1 Series devices supported by replacing the probe
Common probe with RTE870/C Light*
(*) Compact emulator for 870/C Series
Connected with the host system via USB
IDE included (downloadable from website)
Supports on-chip debug emulation.