Computer Hardware User's Manual

TMP92CM22
2007-02-16
92CM22-134
(3) 16-bit programmable pulse generation (PPG) output mode
Square wave pulses can be generated at any frequency and duty ratio. The output
pulse may be either low active or high active.
The PPG mode is obtained by inversion of the timer flip-flop TB0FF0 that is to be
enabled by the match of the up counter UC10 with timer register TB0RG0H/L or
TB0RG1H/L and to be output to TB0OUT0. In this mode, the following conditions must
be satisfied.
(Set value of TB0RG0H/L) < (Set value of TB0RG1H/L)
Figure 3.8.9 Programmable Pulse Generation (PPG) Output Waveforms
When the TB0RG0H/L double buffer is enabled in this mode, the value of register
buffer 10 will be shifted into TB0RG0H/L at match with TB0RG1H/L. This feature
makes easy the handling of low-duty waves.
Figure 3.8.10 Operation of Register Buffer
Match with TB0RG0H/L
(INTTB00 interrupt )
Match with TB0RG1H/L
(INTTB01 interrupt)
TB0OUT0
p
in
Q
2
Q
1
Match with TB0RG0H/L
Q
3
Q
2
Up counter
=
Q
1
Up counter = Q
2
Shift in to TB0RG1H/L
Write TB0RG0H/L
TB0RG0H/L
(Compare value)
Re
g
ister buffe
r
10
Match with TB0RG1H/L