Information

Texas Instruments Signal Chain Guide 2013 | 135
Interface
General – UARTs
Dual UART with 64-Byte FIFO
TL16C752C
The TL16C752C is a dual universal asynchronous receiver/transmitter (UART) with
64-byte FIFOs, automatic hardware/software flow control and data rates up to 3 Mbps.
It incorporates the functionality of two UARTs, each UART having its own register set
and FIFOs. The two UARTs share only the data bus interface and clock source; other
-
wise they operate independently. Another name for the UART function is asynchronous
communications element (ACE), and these terms ar
e used interchangeably. It has a
transmission control register (TCR) that stores received FIFO threshold levels to start/
stop transmission during hardware and software flow control.
TL16C752C functional block diagram
Key Features
• ST16C654/654Dpin-compatiblewith
additional enhancements
(PFB package only)
• Supportsupto24-MHzcrystal 
input clock (1.5 Mbps)
• Supportsupto48-MHzoscillator
input clock (3 Mbps) for 5 V-operation
• Supportsupto32MHzoscillatorinput
clock (2 Mbps) for 3.3-V operation
• Supportsupto24-MHzinputclock
(1.5 Mbps) for 2.5-V operation
• Supportsupto16MHzinputclock
(1 Mbps) for 1.8-V operation
• ProgrammablereceiveFIFOtrigger
levels for software/hardware flow
control
• Software/hardwareflowcontrol
Programmable Xon/Xoff characters
Programmable auto-RTS and
auto-CTS
• Characterizedforoperation 
from –40°C to +85°C, available
in commercial and industrial
temperature grades
Get more information: www.ti.com/product/TL16C752C
BAUD
Rate
Gen
16-Byte RX FIFO
UART Channel A
UART Regs
UART Regs
RX
TX
TXA
CTSA
OPA, DTRA
DSRA, RIA, CDA
RTSA
RXA
16-Byte TX FIFO
BAUD
Rate
Gen
16-Byte RX FIFO
UART Channel B
RX
TX
16-Byte TX FIFO
TXB
VCC
GND
CTSB
OPB, DTRB
DSRB, RIB, CDB
RTSB
RXB
XTAL2
XTAL1
RESET
RXRDYB
RXRDYA
TXRDYB
TXRDYA
INTB
INTA
IOW
IOR
CSB
CSA
D7-D0
A2-A0
Data Bus
Interface
Crystal
OSC
Buffer