Datasheet
XIO3130
www.ti.com
SLLS693F–MAY 2007–REVISED JANUARY 2010
4.2.66 TI Proprietary Register
This read/write TI proprietary register is located at offset C8h and controls TI proprietary functions. This
register must not be changed from the specified default state. If the default value is changed in error, a
PCI Express Reset (PERST) returns this register to a default state.
If an EEPROM is used to load configuration registers, the value loaded for this register must be
00000001h.
PCI register offset: C8h
Register type: Read/Write
Default value: xxxx 0001h
BIT NUMBER 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RESET STATE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
BIT NUMBER 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESET STATE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
4.2.67 TI Proprietary Register
This read/write TI proprietary register is located at offset CCh and controls TI proprietary functions. This
register must not be changed from the specified default state. If the default value is changed in error, a
PCI Express Reset (PERST) returns this register to a default state.
If an EEPROM is used to load configuration registers, the value loaded for this register must be
00000000h.
PCI register offset: CCh
Register type: Read/Write
Default value: 0000 0000h
BIT NUMBER 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RESET STATE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
BIT NUMBER 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESET STATE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
4.2.68 TI Proprietary Register
This read/write TI proprietary register is located at offset D0h and controls TI proprietary functions. This
register must not be changed from the specified default state. If the default value is changed in error, a
PCI Express Reset (PERST) returns this register to a default state.
If an EEPROM is used to load configuration registers, the value loaded for this register must be
32140000h.
PCI register offset: D0h
Register type: Read/Write
Default value: 3214 0000h
BIT NUMBER 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RESET STATE 0 0 1 1 0 0 1 0 0 0 0 1 0 1 0 0
BIT NUMBER 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESET STATE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Copyright © 2007–2010, Texas Instruments Incorporated XIO3130 Configuration Register Space 75
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